37 lines
1 KiB
Plaintext
Executable file
37 lines
1 KiB
Plaintext
Executable file
Hisilicon System Reset Controller
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======================================
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Please also refer to reset.txt in this directory for common reset
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controller binding usage.
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The reset controller registers are part of the system-ctl block on
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hi6220 SoC.
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Required properties:
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- compatible: should be one of the following:
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- "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller.
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- "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller.
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- reg: should be register base and length as documented in the
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datasheet
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- #reset-cells: 1, see below
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Example:
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sys_ctrl: sys_ctrl@f7030000 {
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compatible = "hisilicon,hi6220-sysctrl", "syscon";
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reg = <0x0 0xf7030000 0x0 0x2000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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Specifying reset lines connected to IP modules
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==============================================
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example:
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uart1: serial@..... {
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...
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resets = <&sys_ctrl PERIPH_RSTEN3_UART1>;
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...
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};
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The index could be found in <dt-bindings/reset/hisi,hi6220-resets.h>.
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