105 lines
2.8 KiB
Plaintext
Executable file
105 lines
2.8 KiB
Plaintext
Executable file
Qualcomm Shared Memory State Machine
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The Shared Memory State Machine facilitates broadcasting of single bit state
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information between the processors in a Qualcomm SoC. Each processor is
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assigned 32 bits of state that can be modified. A processor can through a
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matrix of bitmaps signal subscription of notifications upon changes to a
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certain bit owned by a certain remote processor.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be one of:
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"qcom,smsm"
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- qcom,ipc-N:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: three entries specifying the outgoing ipc bit used for
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signaling the N:th remote processor
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- phandle to a syscon node representing the apcs registers
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- u32 representing offset to the register within the syscon
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- u32 representing the ipc bit within the register
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- qcom,local-host:
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Usage: optional
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Value type: <u32>
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Definition: identifier of the local processor in the list of hosts, or
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in other words specifier of the column in the subscription
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matrix representing the local processor
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defaults to host 0
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- #address-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 1
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- #size-cells:
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Usage: required
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Value type: <u32>
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Definition: must be 0
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= SUBNODES
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Each processor's state bits are described by a subnode of the smsm device node.
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Nodes can either be flagged as an interrupt-controller to denote a remote
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processor's state bits or the local processors bits. The node names are not
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important.
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- reg:
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Usage: required
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Value type: <u32>
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Definition: specifies the offset, in words, of the first bit for this
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entry
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- #qcom,smem-state-cells:
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Usage: required for local entry
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Value type: <u32>
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Definition: must be 1 - denotes bit number
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- interrupt-controller:
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Usage: required for remote entries
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Value type: <empty>
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Definition: marks the entry as a interrupt-controller and the state bits
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to belong to a remote processor
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- #interrupt-cells:
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Usage: required for remote entries
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Value type: <u32>
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Definition: must be 2 - denotes bit number and IRQ flags
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- interrupts:
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Usage: required for remote entries
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Value type: <prop-encoded-array>
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Definition: one entry specifying remote IRQ used by the remote processor
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to signal changes of its state bits
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= EXAMPLE
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The following example shows the SMEM setup for controlling properties of the
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wireless processor, defined from the 8974 apps processor's point-of-view. It
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encompasses one outbound entry and the outgoing interrupt for the wireless
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processor.
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smsm {
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compatible = "qcom,smsm";
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,ipc-3 = <&apcs 8 19>;
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apps_smsm: apps@0 {
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reg = <0>;
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#qcom,smem-state-cells = <1>;
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};
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wcnss_smsm: wcnss@7 {
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reg = <7>;
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interrupts = <0 144 1>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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