39 lines
1.6 KiB
Plaintext
Executable file
39 lines
1.6 KiB
Plaintext
Executable file
Qualcomm Technologies Level-2 Cache Performance Monitoring Unit (PMU)
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=====================================================================
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This driver supports the L2 cache clusters found in Qualcomm Technologies
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Centriq SoCs. There are multiple physical L2 cache clusters, each with their
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own PMU. Each cluster has one or more CPUs associated with it.
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There is one logical L2 PMU exposed, which aggregates the results from
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the physical PMUs.
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The driver provides a description of its available events and configuration
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options in sysfs, see /sys/devices/l2cache_0.
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The "format" directory describes the format of the events.
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Events can be envisioned as a 2-dimensional array. Each column represents
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a group of events. There are 8 groups. Only one entry from each
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group can be in use at a time. If multiple events from the same group
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are specified, the conflicting events cannot be counted at the same time.
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Events are specified as 0xCCG, where CC is 2 hex digits specifying
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the code (array row) and G specifies the group (column) 0-7.
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In addition there is a cycle counter event specified by the value 0xFE
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which is outside the above scheme.
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The driver provides a "cpumask" sysfs attribute which contains a mask
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consisting of one CPU per cluster which will be used to handle all the PMU
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events on that cluster.
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Examples for use with perf:
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perf stat -e l2cache_0/config=0x001/,l2cache_0/config=0x042/ -a sleep 1
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perf stat -e l2cache_0/config=0xfe/ -C 2 sleep 1
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The driver does not support sampling, therefore "perf record" will
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not work. Per-task perf sessions are not supported.
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