95 lines
2.2 KiB
ArmAsm
Executable file
95 lines
2.2 KiB
ArmAsm
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2016 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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#include <asm/errno.h>
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#include <asm/unwind.h>
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#include "proc-macros.S"
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/*
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* __xxxx_dcache_user_area(start,size)
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*
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* Ensure that any D-cache lines for the interval [start, start+size)
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* are cleaned or/and invalidated to the PoC.
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*
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* - start - virtual start address of region (EL0/EL1)
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* - size - size in question
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*/
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ENTRY(__clean_dcache_user_area)
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uaccess_enable r2
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add r1, r1, r0
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dcache_line_size r2, r3
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sub r3, r2, #1
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bic r0, r0, r3
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#ifdef CONFIG_ARM_ERRATA_764369
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ALT_SMP(W(dsb))
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ALT_UP(W(nop))
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#endif
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1:
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#if defined(CONFIG_ARM_ERRATA_855873) || defined(CONFIG_ARM_ERRATA_824069)
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mcr p15, 0, r0, c7, c14, 1 @ clean and invalidate D / U line
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#else
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mcr p15, 0, r0, c7, c10, 1 @ clean D / U line
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#endif
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add r0, r0, r2
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cmp r0, r1
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blo 1b
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dsb st
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uaccess_disable r2
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ret lr
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ENDPROC(__clean_dcache_user_area)
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ENTRY(__clean_dcache_area_poc)
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add r1, r1, r0
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b v7_dma_clean_range
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ENDPROC(__clean_dcache_area_poc)
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ENTRY(__flush_dcache_user_area)
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uaccess_enable r2
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add r1, r1, r0
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dcache_line_size r2, r3
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sub r3, r2, #1
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bic r0, r0, r3
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#ifdef CONFIG_ARM_ERRATA_764369
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ALT_SMP(W(dsb))
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ALT_UP(W(nop))
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#endif
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1:
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mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D / U line
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add r0, r0, r2
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cmp r0, r1
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blo 1b
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dsb st
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uaccess_disable r2
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ret lr
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ENDPROC(__flush_dcache_user_area)
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ENTRY(__flush_dcache_area)
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add r1, r1, r0
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b v7_dma_flush_range
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ENDPROC(__flush_dcache_area)
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ENTRY(__inval_dcache_user_area)
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b __flush_dcache_user_area
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ENDPROC(__inval_dcache_user_area)
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ENTRY(__inval_dcache_area)
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add r1, r1, r0
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b v7_dma_inv_range
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ENDPROC(__inval_dcache_area)
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