179 lines
6.1 KiB
C
Executable file
179 lines
6.1 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* http://armlinux.simtec.co.uk/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C Platform - GPIO pin configuration
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*/
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/* This file contains the necessary definitions to get the basic gpio
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* pin configuration done such as setting a pin to input or output or
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* changing the pull-{up,down} configurations.
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*/
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/* Note, this interface is being added to the s3c64xx arch first and will
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* be added to the s3c24xx systems later.
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*/
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#ifndef __PLAT_GPIO_CFG_H
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#define __PLAT_GPIO_CFG_H __FILE__
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#include <linux/types.h>
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typedef unsigned int __bitwise samsung_gpio_pull_t;
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/* forward declaration if gpio-core.h hasn't been included */
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struct samsung_gpio_chip;
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/**
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* struct samsung_gpio_cfg GPIO configuration
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* @cfg_eint: Configuration setting when used for external interrupt source
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* @get_pull: Read the current pull configuration for the GPIO
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* @set_pull: Set the current pull configuration for the GPIO
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* @set_config: Set the current configuration for the GPIO
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* @get_config: Read the current configuration for the GPIO
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*
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* Each chip can have more than one type of GPIO bank available and some
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* have different capabilites even when they have the same control register
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* layouts. Provide an point to vector control routine and provide any
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* per-bank configuration information that other systems such as the
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* external interrupt code will need.
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*
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* @sa samsung_gpio_cfgpin
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* @sa s3c_gpio_getcfg
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* @sa s3c_gpio_setpull
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* @sa s3c_gpio_getpull
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*/
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struct samsung_gpio_cfg {
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unsigned int cfg_eint;
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samsung_gpio_pull_t (*get_pull)(struct samsung_gpio_chip *chip, unsigned offs);
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int (*set_pull)(struct samsung_gpio_chip *chip, unsigned offs,
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samsung_gpio_pull_t pull);
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unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs);
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int (*set_config)(struct samsung_gpio_chip *chip, unsigned offs,
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unsigned config);
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};
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#define S3C_GPIO_SPECIAL_MARK (0xfffffff0)
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#define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x))
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/* Defines for generic pin configurations */
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#define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0))
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#define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
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#define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
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#define samsung_gpio_is_cfg_special(_cfg) \
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(((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
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/**
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* s3c_gpio_cfgpin() - Change the GPIO function of a pin.
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* @pin pin The pin number to configure.
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* @to to The configuration for the pin's function.
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*
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* Configure which function is actually connected to the external
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* pin, such as an gpio input, output or some form of special function
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* connected to an internal peripheral block.
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*
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* The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
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* or S3C_GPIO_SFN() to indicate one of the possible values that the helper
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* will then generate the correct bit mask and shift for the configuration.
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*
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* If a bank of GPIOs all needs to be set to special-function 2, then
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* the following code will work:
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*
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* for (gpio = start; gpio < end; gpio++)
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* s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
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*
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* The @to parameter can also be a specific value already shifted to the
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* correct position in the control register, although these are discouraged
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* in newer kernels and are only being kept for compatibility.
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*/
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extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
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/**
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* s3c_gpio_getcfg - Read the current function for a GPIO pin
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* @pin: The pin to read the configuration value for.
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*
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* Read the configuration state of the given @pin, returning a value that
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* could be passed back to s3c_gpio_cfgpin().
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*
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* @sa s3c_gpio_cfgpin
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*/
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extern unsigned s3c_gpio_getcfg(unsigned int pin);
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/**
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* s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
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* @start: The pin number to start at
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* @nr: The number of pins to configure from @start.
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* @cfg: The configuration for the pin's function
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*
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* Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
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*
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* @sa s3c_gpio_cfgpin.
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*/
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extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
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unsigned int cfg);
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/* Define values for the pull-{up,down} available for each gpio pin.
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*
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* These values control the state of the weak pull-{up,down} resistors
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* available on most pins on the S3C series. Not all chips support both
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* up or down settings, and it may be dependent on the chip that is being
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* used to whether the particular mode is available.
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*/
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#define S3C_GPIO_PULL_NONE ((__force samsung_gpio_pull_t)0x00)
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#define S3C_GPIO_PULL_DOWN ((__force samsung_gpio_pull_t)0x01)
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#define S3C_GPIO_PULL_UP ((__force samsung_gpio_pull_t)0x02)
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/**
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* s3c_gpio_setpull() - set the state of a gpio pin pull resistor
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* @pin: The pin number to configure the pull resistor.
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* @pull: The configuration for the pull resistor.
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*
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* This function sets the state of the pull-{up,down} resistor for the
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* specified pin. It will return 0 if successful, or a negative error
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* code if the pin cannot support the requested pull setting.
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*
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* @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
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*/
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extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull);
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/**
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* s3c_gpio_getpull() - get the pull resistor state of a gpio pin
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* @pin: The pin number to get the settings for
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*
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* Read the pull resistor value for the specified pin.
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*/
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extern samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
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/* configure `all` aspects of an gpio */
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/**
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* s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
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* @start: The gpio number to start at.
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* @nr: The number of gpio to configure from @start.
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* @cfg: The configuration to use
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* @pull: The pull setting to use.
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*
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* Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
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* @gpio and running for @size.
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*
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* @sa s3c_gpio_cfgpin
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* @sa s3c_gpio_setpull
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* @sa s3c_gpio_cfgpin_range
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*/
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extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
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unsigned int cfg, samsung_gpio_pull_t pull);
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static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
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unsigned int cfg)
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{
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return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
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}
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#endif /* __PLAT_GPIO_CFG_H */
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