178 lines
2.8 KiB
Plaintext
Executable file
178 lines
2.8 KiB
Plaintext
Executable file
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree Include file for Freescale Layerscape-1046A family SoC.
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*
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* Copyright 2016 Freescale Semiconductor, Inc.
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*
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* Shaohui Xie <Shaohui.Xie@nxp.com>
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*/
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/dts-v1/;
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#include "fsl-ls1046a.dtsi"
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/ {
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model = "LS1046A QDS Board";
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compatible = "fsl,ls1046a-qds", "fsl,ls1046a";
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aliases {
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gpio0 = &gpio0;
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gpio1 = &gpio1;
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gpio2 = &gpio2;
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gpio3 = &gpio3;
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serial0 = &duart0;
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serial1 = &duart1;
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serial2 = &duart2;
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serial3 = &duart3;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&dspi {
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bus-num = <0>;
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q128a11", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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};
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flash@1 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "sst25wf040b", "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <1>;
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spi-max-frequency = <10000000>;
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};
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flash@2 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "en25s64", "jedec,spi-nor";
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spi-cpol;
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spi-cpha;
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reg = <2>;
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spi-max-frequency = <10000000>;
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};
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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pca9547@77 {
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compatible = "nxp,pca9547";
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reg = <0x77>;
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#address-cells = <1>;
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#size-cells = <0>;
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x2>;
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ina220@40 {
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compatible = "ti,ina220";
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reg = <0x40>;
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shunt-resistor = <1000>;
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};
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ina220@41 {
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compatible = "ti,ina220";
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reg = <0x41>;
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shunt-resistor = <1000>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3>;
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rtc@51 {
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compatible = "nxp,pcf2129";
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reg = <0x51>;
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/* IRQ10_B */
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interrupts = <0 150 0x4>;
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};
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eeprom@56 {
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compatible = "atmel,24c512";
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reg = <0x56>;
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};
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eeprom@57 {
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compatible = "atmel,24c512";
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reg = <0x57>;
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};
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temp-sensor@4c {
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compatible = "adi,adt7461a";
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reg = <0x4c>;
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};
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};
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};
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};
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&ifc {
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#address-cells = <2>;
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#size-cells = <1>;
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/* NOR, NAND Flashes and FPGA on board */
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ranges = <0x0 0x0 0x0 0x60000000 0x08000000
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0x1 0x0 0x0 0x7e800000 0x00010000
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0x2 0x0 0x0 0x7fb00000 0x00000100>;
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status = "okay";
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nor@0,0 {
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compatible = "cfi-flash";
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reg = <0x0 0x0 0x8000000>;
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bank-width = <2>;
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device-width = <1>;
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};
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nand@1,0 {
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compatible = "fsl,ifc-nand";
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reg = <0x1 0x0 0x10000>;
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};
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fpga: board-control@2,0 {
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compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis";
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reg = <0x2 0x0 0x0000100>;
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};
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};
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&lpuart0 {
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status = "okay";
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};
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&qspi {
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num-cs = <2>;
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bus-num = <0>;
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status = "okay";
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qflash0: s25fl128s@0 {
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compatible = "spansion,m25p80";
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#address-cells = <1>;
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#size-cells = <1>;
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spi-max-frequency = <20000000>;
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reg = <0>;
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};
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};
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#include "fsl-ls1046-post.dtsi"
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