514 lines
14 KiB
Plaintext
Executable file
514 lines
14 KiB
Plaintext
Executable file
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Copyright (c) 2019 MediaTek Inc.
|
|
*/
|
|
#include <dt-bindings/iio/mt635x-auxadc.h>
|
|
|
|
&main_pmic {
|
|
pmic_accdet: pmic_accdet {
|
|
compatible = "mediatek,mt6357-accdet";
|
|
accdet-name = "mt63xx-accdet";
|
|
accdet-mic-vol = <6>;
|
|
accdet-plugout-debounce = <1>;
|
|
accdet-mic-mode = <1>;
|
|
headset-mode-setting = <0x500 0x500 1 0x1f0
|
|
0x800 0x800 0x20 0x44>;
|
|
headset-eint-level-pol = <8>;
|
|
headset-use-ap-eint = <0>;
|
|
headset-eint-num = <0>;
|
|
headset-eint-trig-mode = <0>;
|
|
headset-key-mode = <0>;
|
|
/*min_3pole--max_3pole--min_4pole--max_4pole--vol_bias*/
|
|
headset-vol-threshold = <0 590 591 1680 2600>;
|
|
headset-three-key-threshold = <0 80 220 400>;
|
|
headset-three-key-threshold-CDD = <0 121 192 600>;
|
|
headset-four-key-threshold = <0 58 121 192 400>;
|
|
io-channels = <&pmic_auxadc AUXADC_ACCDET>;
|
|
io-channel-names = "pmic_accdet";
|
|
nvmem = <&pmic_efuse>;
|
|
nvmem-names = "mt63xx-accdet-efuse";
|
|
|
|
/* moisture SW mode config start, use external resister or not.
|
|
*/
|
|
moisture-ver = <1>;
|
|
moisture_use_ext_res = <1>;
|
|
moisture-external-r = <470000>;
|
|
/* moisture of water resister ohm, SW mode by auxadc*/
|
|
moisture-water-r = <50000>;
|
|
/* moisture SW mode config end */
|
|
status = "okay";
|
|
};
|
|
|
|
mt6357keys: mt6357keys {
|
|
compatible = "mediatek,mt6357-keys";
|
|
mediatek,long-press-mode = <2>;
|
|
power-off-time-sec = <0>;
|
|
|
|
power {
|
|
linux,keycodes = <116>;
|
|
wakeup-source;
|
|
};
|
|
|
|
home {
|
|
linux,keycodes = <115>;
|
|
};
|
|
};
|
|
|
|
pmic_auxadc: pmic_auxadc {
|
|
compatible = "mediatek,pmic-auxadc",
|
|
"mediatek,mt6357-auxadc";
|
|
#io-channel-cells = <1>;
|
|
#interconnect-cells = <1>;
|
|
batadc {
|
|
channel = <AUXADC_BATADC>;
|
|
resistance-ratio = <3 1>;
|
|
avg-num = <128>;
|
|
};
|
|
isense {
|
|
channel = <AUXADC_ISENSE>;
|
|
resistance-ratio = <3 1>;
|
|
avg-num = <128>;
|
|
};
|
|
vcdt {
|
|
channel = <AUXADC_VCDT>;
|
|
};
|
|
bat_temp {
|
|
channel = <AUXADC_BAT_TEMP>;
|
|
resistance-ratio = <1 1>;
|
|
};
|
|
chip_temp {
|
|
channel = <AUXADC_CHIP_TEMP>;
|
|
};
|
|
vcore_temp {
|
|
channel = <AUXADC_VCORE_TEMP>;
|
|
};
|
|
vproc_temp {
|
|
channel = <AUXADC_VPROC_TEMP>;
|
|
};
|
|
accdet {
|
|
channel = <AUXADC_ACCDET>;
|
|
};
|
|
tsx_temp {
|
|
channel = <AUXADC_TSX_TEMP>;
|
|
avg-num = <128>;
|
|
};
|
|
hpofs_cal {
|
|
channel = <AUXADC_HPOFS_CAL>;
|
|
avg-num = <256>;
|
|
};
|
|
dcxo_temp {
|
|
channel = <AUXADC_DCXO_TEMP>;
|
|
avg-num = <16>;
|
|
};
|
|
vbif {
|
|
channel = <AUXADC_VBIF>;
|
|
resistance-ratio = <1 1>;
|
|
};
|
|
imp {
|
|
channel = <AUXADC_IMP>;
|
|
resistance-ratio = <3 1>;
|
|
avg-num = <128>;
|
|
};
|
|
imix_r {
|
|
channel = <AUXADC_IMIX_R>;
|
|
};
|
|
};
|
|
|
|
mtk_gauge: mtk_gauge {
|
|
compatible = "mediatek,mt6357-gauge";
|
|
charger = <&mt6370_chg>;
|
|
bootmode = <&chosen>;
|
|
io-channels = <&pmic_auxadc AUXADC_BAT_TEMP>,
|
|
<&pmic_auxadc AUXADC_ISENSE>,
|
|
<&pmic_auxadc AUXADC_VBIF>,
|
|
<&pmic_auxadc AUXADC_IMP>,
|
|
<&pmic_auxadc AUXADC_IMIX_R>;
|
|
io-channel-names = "pmic_battery_temp",
|
|
"pmic_battery_voltage",
|
|
"pmic_bif_voltage",
|
|
"pmic_ptim_voltage",
|
|
"pmic_ptim_r";
|
|
nvmem-cells = <&fg_init>, <&fg_soc>;
|
|
nvmem-cell-names = "initialization", "state-of-charge";
|
|
};
|
|
|
|
mtk_charger_type: mtk_charger_type {
|
|
compatible = "mediatek,mt6357-charger-type";
|
|
io-channels = <&pmic_auxadc AUXADC_VCDT>;
|
|
io-channel-names = "pmic_vbus";
|
|
bc12_active = <0>;
|
|
};
|
|
|
|
mt6357_charger: mt6357_charger {
|
|
compatible = "mediatek,mt6357-pulse-charger";
|
|
charger_name = "primary_chg";
|
|
alias_name = "mt6357";
|
|
ichg = <500000>; /* uA */
|
|
cv = <4350000>; /* uV */
|
|
vcdt_hv_thres = <7000000>; /* uV */
|
|
vbat_ov_thres = <4450000>; /* uV */
|
|
};
|
|
|
|
mtk_ts_pmic: mtk_ts_pmic {
|
|
compatible = "mediatek,mtk_ts_pmic";
|
|
io-channels =
|
|
<&pmic_auxadc AUXADC_CHIP_TEMP>,
|
|
<&pmic_auxadc AUXADC_VCORE_TEMP>,
|
|
<&pmic_auxadc AUXADC_VPROC_TEMP>;
|
|
io-channel-names =
|
|
"pmic_chip_temp",
|
|
"pmic_buck1_temp",
|
|
"pmic_buck2_temp";
|
|
interconnects = <&pmic_auxadc 1>;
|
|
#interconnect-cells = <1>;
|
|
};
|
|
mt6357_ts_buck1: mt6357_ts_buck1 {
|
|
compatible = "mediatek,mt6357_ts_buck1";
|
|
io-channels =
|
|
<&pmic_auxadc AUXADC_VCORE_TEMP>;
|
|
io-channel-names =
|
|
"pmic_buck1_temp";
|
|
interconnects = <&mtk_ts_pmic 1>;
|
|
|
|
};
|
|
mt6357_ts_buck2: mt6357_ts_buck2 {
|
|
compatible = "mediatek,mt6357_ts_buck2";
|
|
io-channels =
|
|
<&pmic_auxadc AUXADC_VPROC_TEMP>;
|
|
io-channel-names =
|
|
"pmic_buck2_temp";
|
|
interconnects = <&mtk_ts_pmic 1>;
|
|
|
|
};
|
|
pmic_efuse: pmic_efuse {
|
|
compatible = "mediatek,mt6357-efuse";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
};
|
|
|
|
mt6357regulator: mt6357regulator {
|
|
compatible = "mediatek,mt6357-regulator";
|
|
mt_pmic_vs1_buck_reg: buck_vs1 {
|
|
regulator-name = "vs1";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <2200000>;
|
|
regulator-ramp-delay = <12500>;
|
|
regulator-enable-ramp-delay = <220>;
|
|
};
|
|
mt_pmic_vmodem_buck_reg: buck_vmodem {
|
|
regulator-name = "vmodem";
|
|
regulator-min-microvolt = <500000>;
|
|
regulator-max-microvolt = <1193750>;
|
|
regulator-ramp-delay = <6250>;
|
|
regulator-enable-ramp-delay = <220>;
|
|
};
|
|
mt_pmic_vcore_buck_reg: buck_vcore {
|
|
regulator-name = "vcore";
|
|
regulator-min-microvolt = <518750>;
|
|
regulator-max-microvolt = <1312500>;
|
|
regulator-ramp-delay = <6250>;
|
|
regulator-enable-ramp-delay = <220>;
|
|
};
|
|
mt_pmic_vproc_buck_reg: buck_vproc {
|
|
regulator-name = "vproc";
|
|
regulator-min-microvolt = <518750>;
|
|
regulator-max-microvolt = <1312500>;
|
|
regulator-ramp-delay = <6250>;
|
|
regulator-enable-ramp-delay = <220>;
|
|
};
|
|
mt_pmic_vpa_buck_reg: buck_vpa {
|
|
regulator-name = "vpa";
|
|
regulator-min-microvolt = <500000>;
|
|
regulator-max-microvolt = <3650000>;
|
|
regulator-ramp-delay = <50000>;
|
|
regulator-enable-ramp-delay = <220>;
|
|
};
|
|
mt_pmic_vfe28_ldo_reg: ldo_vfe28 {
|
|
regulator-name = "vfe28";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vxo22_ldo_reg: ldo_vxo22 {
|
|
regulator-name = "vxo22";
|
|
regulator-min-microvolt = <2200000>;
|
|
regulator-max-microvolt = <2400000>;
|
|
regulator-enable-ramp-delay = <110>;
|
|
};
|
|
mt_pmic_vrf18_ldo_reg: ldo_vrf18 {
|
|
regulator-name = "vrf18";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-enable-ramp-delay = <110>;
|
|
};
|
|
mt_pmic_vrf12_ldo_reg: ldo_vrf12 {
|
|
regulator-name = "vrf12";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-enable-ramp-delay = <110>;
|
|
};
|
|
mt_pmic_vefuse_ldo_reg: ldo_vefuse {
|
|
regulator-name = "vefuse";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vcn33_bt_ldo_reg: ldo_vcn33_bt {
|
|
regulator-name = "vcn33_bt";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3500000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vcn33_wifi_ldo_reg: ldo_vcn33_wifi {
|
|
regulator-name = "vcn33_wifi";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3500000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vcn28_ldo_reg: ldo_vcn28 {
|
|
regulator-name = "vcn28";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vcn18_ldo_reg: ldo_vcn18 {
|
|
regulator-name = "vcn18";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vcama_ldo_reg: ldo_vcama {
|
|
regulator-name = "vcama";
|
|
regulator-min-microvolt = <2500000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vcamd_ldo_reg: ldo_vcamd {
|
|
regulator-name = "vcamd";
|
|
regulator-min-microvolt = <1000000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vcamio_ldo_reg: ldo_vcamio {
|
|
regulator-name = "vcamio";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vldo28_ldo_reg: ldo_vldo28 {
|
|
regulator-name = "vldo28";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <3000000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vsram_others_ldo_reg: ldo_vsram_others {
|
|
regulator-name = "vsram_others";
|
|
regulator-min-microvolt = <518750>;
|
|
regulator-max-microvolt = <1312500>;
|
|
regulator-ramp-delay = <6250>;
|
|
regulator-enable-ramp-delay = <110>;
|
|
};
|
|
mt_pmic_vsram_proc_ldo_reg: ldo_vsram_proc {
|
|
regulator-name = "vsram_proc";
|
|
regulator-min-microvolt = <518750>;
|
|
regulator-max-microvolt = <1312500>;
|
|
regulator-ramp-delay = <6250>;
|
|
regulator-enable-ramp-delay = <110>;
|
|
};
|
|
mt_pmic_vaux18_ldo_reg: ldo_vaux18 {
|
|
regulator-name = "vaux18";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vaud28_ldo_reg: ldo_vaud28 {
|
|
regulator-name = "vaud28";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vio28_ldo_reg: ldo_vio28 {
|
|
regulator-name = "vio28";
|
|
regulator-min-microvolt = <2800000>;
|
|
regulator-max-microvolt = <2800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vio18_ldo_reg: ldo_vio18 {
|
|
regulator-name = "vio18";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vdram_ldo_reg: ldo_vdram {
|
|
regulator-name = "vdram";
|
|
regulator-min-microvolt = <1100000>;
|
|
regulator-max-microvolt = <1200000>;
|
|
regulator-enable-ramp-delay = <3300>;
|
|
};
|
|
mt_pmic_vmc_ldo_reg: ldo_vmc {
|
|
regulator-name = "vmc";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-enable-ramp-delay = <44>;
|
|
};
|
|
mt_pmic_vmch_ldo_reg: ldo_vmch {
|
|
regulator-name = "vmch";
|
|
regulator-min-microvolt = <2900000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-enable-ramp-delay = <44>;
|
|
};
|
|
mt_pmic_vemc_ldo_reg: ldo_vemc {
|
|
regulator-name = "vemc";
|
|
regulator-min-microvolt = <2900000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-enable-ramp-delay = <44>;
|
|
regulator-always-on;
|
|
};
|
|
mt_pmic_vsim1_ldo_reg: ldo_vsim1 {
|
|
regulator-name = "vsim1";
|
|
regulator-min-microvolt = <1700000>;
|
|
regulator-max-microvolt = <3100000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vsim2_ldo_reg: ldo_vsim2 {
|
|
regulator-name = "vsim2";
|
|
regulator-min-microvolt = <1700000>;
|
|
regulator-max-microvolt = <3100000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
mt_pmic_vibr_ldo_reg: ldo_vibr {
|
|
regulator-name = "vibr";
|
|
regulator-min-microvolt = <1200000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-enable-ramp-delay = <44>;
|
|
};
|
|
mt_pmic_vusb33_ldo_reg: ldo_vusb33 {
|
|
regulator-name = "vusb33";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3100000>;
|
|
regulator-enable-ramp-delay = <264>;
|
|
};
|
|
};
|
|
|
|
mtk_dynamic_loading_throttling {
|
|
compatible = "mediatek,mt6357-dynamic_loading_throttling";
|
|
mediatek,charger = <&charger>;
|
|
uvlo-level = <2600>;
|
|
isense_support;
|
|
io-channels = <&pmic_auxadc AUXADC_IMP>,
|
|
<&pmic_auxadc AUXADC_IMIX_R>,
|
|
<&pmic_auxadc AUXADC_ISENSE>,
|
|
<&pmic_auxadc AUXADC_BATADC>;
|
|
io-channel-names = "pmic_ptim",
|
|
"pmic_imix_r",
|
|
"pmic_isense",
|
|
"pmic_batadc";
|
|
};
|
|
|
|
pmic_lbat_service {
|
|
compatible = "mediatek,mt6357-lbat_service";
|
|
};
|
|
|
|
mt6357_debug {
|
|
compatible = "mediatek,mt63xx-debug";
|
|
};
|
|
|
|
mt63xx-oc-debug {
|
|
compatible = "mediatek,mt63xx-oc-debug";
|
|
};
|
|
|
|
leds-mt6357 {
|
|
compatible = "mediatek,mt6357_leds";
|
|
Isink1 {
|
|
reg = <1>;
|
|
label = "red";
|
|
linux,default-trigger = "none";
|
|
default-state = "off";
|
|
};
|
|
};
|
|
|
|
mtk_rtc: mtk_rtc {
|
|
compatible = "mediatek,mt6357-rtc";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
bootmode = <&chosen>;
|
|
|
|
fg_init: fg_init {
|
|
reg = <0 0x1>;
|
|
bits = <0 8>;
|
|
};
|
|
fg_soc: fg_soc {
|
|
reg = <1 0x1>;
|
|
bits = <0 8>;
|
|
};
|
|
ext_32k: ext_32k {
|
|
reg = <2 0x1>;
|
|
bits = <6 1>;
|
|
};
|
|
};
|
|
|
|
pmic_codec: pmic_codec {
|
|
compatible = "mediatek,mt6357-sound";
|
|
mediatek,pwrap-regmap = <&pwrap>;
|
|
nvmem = <&pmic_efuse>;
|
|
nvmem-names = "pmic-hp-efuse";
|
|
io-channels =
|
|
<&pmic_auxadc AUXADC_HPOFS_CAL>,
|
|
<&pmic_auxadc AUXADC_ACCDET>;
|
|
io-channel-names =
|
|
"pmic_codec",
|
|
"pmic_accdet";
|
|
use_hp_depop_flow = <0>; /* select 1: use, 0: not use */
|
|
use_ul_260k = <0>; /* select 1: use, 0: not use */
|
|
};
|
|
|
|
|
|
clock_buffer_ctrl: clock_buffer_ctrl {
|
|
compatible = "mediatek,clock_buffer";
|
|
n-clkbuf-pmic-dependent = <9>;
|
|
clkbuf-pmic-dependent = "pmic-drvcurr",
|
|
"pmic-auxout-sel",
|
|
"pmic-auxout-xo",
|
|
"pmic-auxout-drvcurr",
|
|
"pmic-auxout-bblpm-en",
|
|
"pmic-cofst-fpm",
|
|
"pmic-cdac-fpm",
|
|
"pmic-core-idac-fpm",
|
|
"pmic-aac-fpm-swen";
|
|
|
|
pmic-dcxo-cw = <0x788>;
|
|
pmic-xo-mode = <0x788 0 0x788 3 0x788 6 0x788 9
|
|
0xffff 0xffff 0x7a2 8 0x7a2 11>;
|
|
pmic-xo-en = <0x788 2 0x788 5 0x788 8 0x788 11
|
|
0xffff 0xffff 0x7a2 10 0x7a2 13>;
|
|
pmic-bblpm-sw = <0x788 12>;
|
|
pmic-srclkeni3 = <0x44a 0>;
|
|
|
|
n-pmic-drvcurr = <7>;
|
|
pmic-drvcurr = <0x7b0 0 0x7b0 2 0x7b0 4 0x7b0 6
|
|
0xffff 0xffff 0x7b0 10 0x7b0 12>;
|
|
n-pmic-auxout-sel = <6>;
|
|
pmic-auxout-sel = <0x7b4 0 0x7b4 5 0x7b4 6 0x7b4 7
|
|
0x7b4 6 0x7b4 24>;
|
|
n-pmic-auxout-xo = <7>;
|
|
pmic-auxout-xo = <0x7b6 0 0x7b6 6 0x7b6 0 0x7b6 6
|
|
0xffff 0xffff 0x7b6 6 0x7b6 12>;
|
|
n-pmic-auxout-drvcurr = <7>;
|
|
pmic-auxout-drvcurr = <0x7b6 1 0x7b6 7 0x7b6 1
|
|
0x7b6 7 0xffff 0xffff 0x7b6 1 0x7b6 12>;
|
|
n-pmic-auxout-bblpm-en = <1>;
|
|
pmic-auxout-bblpm-en = <0x7b6 0>;
|
|
|
|
n-pmic-cofst-fpm = <1>;
|
|
pmic-cofst-fpm = <0x796 14>;
|
|
n-pmic-cdac-fpm = <1>;
|
|
pmic-cdac-fpm = <0x794 0>;
|
|
n-pmic-core-idac-fpm = <1>;
|
|
pmic-core-idac-fpm = <0x79a 14>;
|
|
n-pmic-aac-fpm-swen = <1>;
|
|
pmic-aac-fpm-swen = <0x79e 14>;
|
|
};
|
|
|
|
};
|
|
|