c05564c4d8
Android 13
886 lines
19 KiB
Plaintext
Executable file
886 lines
19 KiB
Plaintext
Executable file
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Mars.C <mars.cheng@mediatek.com>
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*
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*/
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/dts-v1/;
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#include "mediatek/mt6779.dtsi"
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#include "mediatek/mt6359.dtsi"
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#include "mediatek/bat_setting/mt6779_battery_prop.dtsi"
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#include <dt-bindings/pinctrl/mt6779-pinfunc.h>
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/ {
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model = "MediaTek MT6779 EVB";
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compatible = "mediatek,mt6779-evb", "mediatek,mt6779";
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aliases {
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serial0 = &uart0;
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};
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memory@40000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x1e800000>;
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};
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chosen {
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stdout-path = "serial0:921600n8";
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};
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};
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&mrdump_ext_rst {
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interrupt-parent = <&pio>;
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interrupts = <0 IRQ_TYPE_LEVEL_LOW 0 0>;
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deb-gpios = <&pio 0 0>;
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debounce = <512000>;
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};
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&i2c0 {
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/* gt1151 add to i2c node */
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-names = "default", "state_eint_as_int",
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"state_eint_output0","state_eint_output1",
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"state_rst_output0", "state_rst_output1";
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pinctrl-0 = <&ctp_pins_default>;
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pinctrl-1 = <&ctp_pins_eint_as_int>;
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pinctrl-2 = <&ctp_pins_eint_output0>;
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pinctrl-3 = <&ctp_pins_eint_output1>;
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pinctrl-4 = <&ctp_pins_rst_output0>;
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pinctrl-5 = <&ctp_pins_rst_output1>;
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status = "okay";
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gt1151@14 {
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compatible = "goodix,gt1151";
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reg = <0x14>;
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status = "okay";
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};
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};
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&odm {
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led0:led@0 {
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compatible = "mediatek,red";
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led_mode = <0>;
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data = <1>;
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pwm_config = <0 0 0 0 0>;
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};
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led1:led@1 {
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compatible = "mediatek,green";
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led_mode = <0>;
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data = <1>;
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pwm_config = <0 0 0 0 0>;
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};
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led2:led@2 {
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compatible = "mediatek,blue";
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led_mode = <0>;
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data = <1>;
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pwm_config = <0 0 0 0 0>;
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};
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led3:led@3 {
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compatible = "mediatek,jogball-backlight";
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led_mode = <0>;
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data = <1>;
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pwm_config = <0 0 0 0 0>;
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};
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led4:led@4 {
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compatible = "mediatek,keyboard-backlight";
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led_mode = <0>;
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data = <1>;
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pwm_config = <0 0 0 0 0>;
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};
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led5:led@5 {
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compatible = "mediatek,button-backlight";
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led_mode = <0>;
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data = <1>;
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pwm_config = <0 0 0 0 0>;
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};
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led6:led@6 {
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compatible = "mediatek,lcd-backlight";
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led_mode = <5>;
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data = <1>;
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pwm_config = <0 1 0 0 0>;
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};
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vibrator0:vibrator@0 {
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compatible = "mediatek,vibrator";
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vib_timer = <25>;
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vib_limit = <9>;
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vib_vol= <9>;
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};
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};
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&pmic {
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compatible = "mediatek,mt6359";
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&pio>;
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interrupts = <193 IRQ_TYPE_LEVEL_HIGH 193 0>;
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};
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&touch {
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tpd-resolution = <1080 2160>;
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use-tpd-button = <0>;
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tpd-key-num = <3>;
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tpd-key-local= <139 172 158 0>;
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tpd-key-dim-local = <90 883 100 40 230
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883 100 40 370 883 100 40 0 0 0 0>;
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tpd-max-touch-num = <10>;
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tpd-filter-enable = <0>;
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tpd-filter-pixel-density = <168>;
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tpd-filter-custom-prameters = <0 0 0 0 0 0 0 0 0 0 0 0>;
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tpd-filter-custom-speed = <0 0 0>;
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goodix,eint-gpio = <&pio 1 0x0>;
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goodix,reset-gpio = <&pio 2 0x0>;
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interrupt-parent = <&pio>;
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interrupts = <1 IRQ_TYPE_EDGE_FALLING 1 0>;
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&keypad {
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mediatek,key-debounce-ms = <1024>;
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/*HW Keycode [0~71] -> Linux Keycode*/
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mediatek,hw-map-num = <72>;
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mediatek,hw-init-map = <114 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
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0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 >;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&kpd_gpios_def_cfg>;
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};
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&pio {
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/* set touch eint and reset gpio status*/
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ctp_pins_default: eint0default {
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};
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ctp_pins_eint_as_int: eint1touch@0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO1__FUNC_GPIO1>;
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input-enable;
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bias-disable;
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};
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};
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ctp_pins_eint_output0: eintoutput0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO1__FUNC_GPIO1>;
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output-low;
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};
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};
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ctp_pins_eint_output1: eintoutput1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO1__FUNC_GPIO1>;
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output-high;
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};
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};
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ctp_pins_rst_output0: rstoutput0 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO2__FUNC_GPIO2>;
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output-low;
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};
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};
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ctp_pins_rst_output1: rstoutput1 {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO2__FUNC_GPIO2>;
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output-high;
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};
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};
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kpd_gpios_def_cfg: kpdgpiodefault {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO59__FUNC_KPCOL0>,
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<PINMUX_GPIO60__FUNC_KPCOL1>;
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mediatek,pull-up-adv = <MTK_PUPD_SET_R1R0_01>;
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pull-up;
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input-enable;
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};
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};
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/* set audio pinctrl status */
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aud_clk_mosi_off: aud_clk_mosi_off {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO189__FUNC_GPIO189>,
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<PINMUX_GPIO190__FUNC_GPIO190>;
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};
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};
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aud_clk_mosi_on: aud_clk_mosi_on {
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pins_cmd0_dat {
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pinmux = <PINMUX_GPIO189__FUNC_AUD_CLK_MOSI>,
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<PINMUX_GPIO190__FUNC_AUD_SYNC_MOSI>;
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};
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};
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aud_dat_mosi_off: aud_dat_mosi_off {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO191__FUNC_GPIO191>;
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input-enable;
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bias-disable;
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};
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pins_cmd2_dat {
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pinmux = <PINMUX_GPIO192__FUNC_GPIO192>;
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input-enable;
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bias-disable;
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};
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};
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aud_dat_mosi_on: aud_dat_mosi_on {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO191__FUNC_AUD_DAT_MOSI0>,
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<PINMUX_GPIO192__FUNC_AUD_DAT_MOSI1>;
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};
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};
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aud_dat_mosi_ch34_off: aud_dat_mosi_ch34_off {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO143__FUNC_GPIO143>;
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input-enable;
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bias-disable;
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};
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};
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aud_dat_mosi_ch34_on: aud_dat_mosi_ch34_on {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO143__FUNC_AUD_DAT_MOSI2>;
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};
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};
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aud_dat_miso_off: aud_dat_miso_off {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO193__FUNC_GPIO193>;
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input-enable;
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bias-disable;
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};
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pins_cmd2_dat {
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pinmux = <PINMUX_GPIO194__FUNC_GPIO194>;
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input-enable;
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bias-disable;
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};
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};
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aud_dat_miso_on: aud_dat_miso_on {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO193__FUNC_AUD_DAT_MISO0>;
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input-schmitt-enable;
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};
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pins_cmd2_dat {
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pinmux = <PINMUX_GPIO194__FUNC_AUD_DAT_MISO1>;
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input-schmitt-enable;
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};
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};
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aud_dat_miso_ch34_off: aud_dat_miso_ch34_off {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO146__FUNC_GPIO146>;
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input-enable;
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bias-disable;
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};
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};
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aud_dat_miso_ch34_on: aud_dat_miso_ch34_on {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO146__FUNC_AUD_DAT_MISO2>;
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input-schmitt-enable;
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};
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};
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vow_dat_miso_off: vow_dat_miso_off {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO193__FUNC_GPIO193>;
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};
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};
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vow_dat_miso_on: vow_dat_miso_on {
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pins_cmd1_dat {
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pinmux = <PINMUX_GPIO193__FUNC_VOW_DAT_MISO>;
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};
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};
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vow_clk_miso_off: vow_clk_miso_off {
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pins_cmd3_dat {
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pinmux = <PINMUX_GPIO194__FUNC_GPIO194>;
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input-schmitt-enable;
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};
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};
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vow_clk_miso_on: vow_clk_miso_on {
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pins_cmd3_dat {
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pinmux = <PINMUX_GPIO194__FUNC_VOW_CLK_MISO>;
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input-schmitt-enable;
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};
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};
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aud_nle_mosi_off: aud_nle_mosi_off {
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pins_cmd3_dat {
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pinmux = <PINMUX_GPIO144__FUNC_GPIO144>,
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<PINMUX_GPIO145__FUNC_GPIO145>;
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};
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};
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aud_nle_mosi_on: aud_nle_mosi_on {
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pins_cmd3_dat {
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pinmux = <PINMUX_GPIO144__FUNC_AUD_NLE_MOSI1>,
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<PINMUX_GPIO145__FUNC_AUD_NLE_MOSI0>;
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};
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};
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aud_dat_miso2_off: aud_dat_miso2_off {
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pins_cmd3_dat {
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pinmux = <PINMUX_GPIO146__FUNC_GPIO146>;
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};
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};
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aud_dat_miso2_on: aud_dat_miso2_on {
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pins_cmd3_dat {
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pinmux = <PINMUX_GPIO146__FUNC_AUD_DAT_MISO2>;
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};
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};
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aud_gpio_i2s0_off: aud_gpio_i2s0_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO70__FUNC_GPIO70>;
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};
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};
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aud_gpio_i2s0_on: aud_gpio_i2s0_on {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO70__FUNC_I2S0_DI>;
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};
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};
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aud_gpio_i2s1_off: aud_gpio_i2s1_off {
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};
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aud_gpio_i2s1_on: aud_gpio_i2s1_on {
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};
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aud_gpio_i2s2_off: aud_gpio_i2s2_off {
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};
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aud_gpio_i2s2_on: aud_gpio_i2s2_on {
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};
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aud_gpio_i2s3_off: aud_gpio_i2s3_off {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO67__FUNC_GPIO67>,
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<PINMUX_GPIO68__FUNC_GPIO68>,
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<PINMUX_GPIO71__FUNC_GPIO71>;
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};
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};
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aud_gpio_i2s3_on: aud_gpio_i2s3_on {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO67__FUNC_I2S3_LRCK>,
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<PINMUX_GPIO68__FUNC_I2S3_DO>,
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<PINMUX_GPIO71__FUNC_I2S3_BCK>;
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};
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};
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aud_gpio_i2s5_off: aud_gpio_i2s5_off {
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};
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aud_gpio_i2s5_on: aud_gpio_i2s5_on {
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};
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};
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/* AUDIO GPIO standardization */
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&afe {
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pinctrl-names = "aud_clk_mosi_off", "aud_clk_mosi_on",
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"aud_dat_mosi_off", "aud_dat_mosi_on",
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"aud_dat_miso_off", "aud_dat_miso_on",
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"vow_dat_miso_off", "vow_dat_miso_on",
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"vow_clk_miso_off", "vow_clk_miso_on",
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"aud_nle_mosi_off", "aud_nle_mosi_on",
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"aud_dat_miso2_off", "aud_dat_miso2_on",
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"aud_gpio_i2s0_off", "aud_gpio_i2s0_on",
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"aud_gpio_i2s1_off", "aud_gpio_i2s1_on",
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"aud_gpio_i2s2_off", "aud_gpio_i2s2_on",
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"aud_gpio_i2s3_off", "aud_gpio_i2s3_on",
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"aud_gpio_i2s5_off", "aud_gpio_i2s5_on",
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"aud_dat_mosi_ch34_off", "aud_dat_mosi_ch34_on",
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"aud_dat_miso_ch34_off", "aud_dat_miso_ch34_on";
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pinctrl-0 = <&aud_clk_mosi_off>;
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pinctrl-1 = <&aud_clk_mosi_on>;
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pinctrl-2 = <&aud_dat_mosi_off>;
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pinctrl-3 = <&aud_dat_mosi_on>;
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pinctrl-4 = <&aud_dat_miso_off>;
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pinctrl-5 = <&aud_dat_miso_on>;
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pinctrl-6 = <&vow_dat_miso_off>;
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pinctrl-7 = <&vow_dat_miso_on>;
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pinctrl-8 = <&vow_clk_miso_off>;
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pinctrl-9 = <&vow_clk_miso_on>;
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pinctrl-10 = <&aud_nle_mosi_off>;
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pinctrl-11 = <&aud_nle_mosi_on>;
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pinctrl-12 = <&aud_dat_miso2_off>;
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pinctrl-13 = <&aud_dat_miso2_on>;
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pinctrl-14 = <&aud_gpio_i2s0_off>;
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pinctrl-15 = <&aud_gpio_i2s0_on>;
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pinctrl-16 = <&aud_gpio_i2s1_off>;
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pinctrl-17 = <&aud_gpio_i2s1_on>;
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pinctrl-18 = <&aud_gpio_i2s2_off>;
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pinctrl-19 = <&aud_gpio_i2s2_on>;
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pinctrl-20 = <&aud_gpio_i2s3_off>;
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pinctrl-21 = <&aud_gpio_i2s3_on>;
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pinctrl-22 = <&aud_gpio_i2s5_off>;
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pinctrl-23 = <&aud_gpio_i2s5_on>;
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pinctrl-24 = <&aud_dat_mosi_ch34_off>;
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pinctrl-25 = <&aud_dat_mosi_ch34_on>;
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pinctrl-26 = <&aud_dat_miso_ch34_off>;
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pinctrl-27 = <&aud_dat_miso_ch34_on>;
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status = "okay";
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};
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/* AUDIO GPIO standardization end */
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&smart_pa {
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interrupt-parent = <&pio>;
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interrupts = <69 IRQ_TYPE_LEVEL_LOW 69 0>;
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status = "okay";
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};
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/* DISPSYS GPIO standardization */
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&pio {
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mtkfb_pins_lcd_bias_enp1: lcd_bias_enp1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO23__FUNC_GPIO23>;
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output-high;
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};
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};
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mtkfb_pins_lcd_bias_enp0: lcd_bias_enp0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO23__FUNC_GPIO23>;
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output-low;
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};
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};
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mtkfb_pins_lcd_bias_enn1: lcd_bias_enn1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO202__FUNC_GPIO202>;
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output-high;
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};
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};
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mtkfb_pins_lcd_bias_enn0: lcd_bias_enn0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO202__FUNC_GPIO202>;
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output-low;
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};
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};
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mtkfb_pins_lcm_rst_out1_gpio: lcm_rst_out1_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO44__FUNC_GPIO44>;
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output-high;
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};
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};
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mtkfb_pins_lcm_rst_out0_gpio: lcm_rst_out0_gpio {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO44__FUNC_GPIO44>;
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output-low;
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};
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};
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mtkfb_pins_lcm_dsi_te: lcm_dsi_te {
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pins_cmd_dat {
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pinmux = <PINMUX_GPIO43__FUNC_DSI_TE>;
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input-enable;
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};
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};
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mtkfb_pins_lcm_mipi0_sdata: lcm_mipi0_sdata {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO95__FUNC_MIPI0_SDATA>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi0_sclk: lcm_mipi0_sclk {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO96__FUNC_MIPI0_SCLK>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi1_sdata: lcm_mipi1_sdata {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO97__FUNC_MIPI1_SDATA>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi1_sclk: lcm_mipi1_sclk {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO98__FUNC_MIPI1_SCLK>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi2_sdata: lcm_mipi2_sdata {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO100__FUNC_MIPI2_SDATA>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi2_sclk: lcm_mipi2_sclk {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO99__FUNC_MIPI2_SCLK>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi3_sdata: lcm_mipi3_sdata {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO102__FUNC_MIPI3_SDATA>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi3_sclk: lcm_mipi3_sclk {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO101__FUNC_MIPI3_SCLK>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi4_sdata: lcm_mipi4_sdata {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO104__FUNC_MIPI4_SDATA>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
mtkfb_pins_lcm_mipi4_sclk: lcm_mipi4_sclk {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO103__FUNC_MIPI4_SCLK>;
|
|
output-low;
|
|
};
|
|
};
|
|
};
|
|
|
|
&mtkfb {
|
|
pinctrl-names = "lcd_bias_enp1_gpio", "lcd_bias_enp0_gpio",
|
|
"lcd_bias_enn1_gpio", "lcd_bias_enn0_gpio",
|
|
"lcm_rst_out1_gpio", "lcm_rst_out0_gpio", "lcm_dsi_te",
|
|
"lcm_mipi0_sdata", "lcm_mipi0_sclk",
|
|
"lcm_mipi1_sdata", "lcm_mipi1_sclk",
|
|
"lcm_mipi2_sdata", "lcm_mipi2_sclk",
|
|
"lcm_mipi3_sdata", "lcm_mipi3_sclk",
|
|
"lcm_mipi4_sdata", "lcm_mipi4_sclk";
|
|
pinctrl-0 = <&mtkfb_pins_lcd_bias_enp1>;
|
|
pinctrl-1 = <&mtkfb_pins_lcd_bias_enp0>;
|
|
pinctrl-2 = <&mtkfb_pins_lcd_bias_enn1>;
|
|
pinctrl-3 = <&mtkfb_pins_lcd_bias_enn0>;
|
|
pinctrl-4 = <&mtkfb_pins_lcm_rst_out1_gpio>;
|
|
pinctrl-5 = <&mtkfb_pins_lcm_rst_out0_gpio>;
|
|
pinctrl-6 = <&mtkfb_pins_lcm_dsi_te>;
|
|
pinctrl-7 = <&mtkfb_pins_lcm_mipi0_sdata>;
|
|
pinctrl-8 = <&mtkfb_pins_lcm_mipi0_sclk>;
|
|
pinctrl-9 = <&mtkfb_pins_lcm_mipi1_sdata>;
|
|
pinctrl-10 = <&mtkfb_pins_lcm_mipi1_sclk>;
|
|
pinctrl-11 = <&mtkfb_pins_lcm_mipi2_sdata>;
|
|
pinctrl-12 = <&mtkfb_pins_lcm_mipi2_sclk>;
|
|
pinctrl-13 = <&mtkfb_pins_lcm_mipi3_sdata>;
|
|
pinctrl-14 = <&mtkfb_pins_lcm_mipi3_sclk>;
|
|
pinctrl-15 = <&mtkfb_pins_lcm_mipi4_sdata>;
|
|
pinctrl-16 = <&mtkfb_pins_lcm_mipi4_sclk>;
|
|
status = "okay";
|
|
};
|
|
|
|
&dsi_te {
|
|
interrupt-parent = <&pio>;
|
|
interrupts = <43 IRQ_TYPE_EDGE_RISING 43 1>;
|
|
status = "okay";
|
|
};
|
|
/* DISPSYS GPIO standardization end */
|
|
|
|
&ssusb {
|
|
dr_mode = "otg";
|
|
mediatek,force-vbus = <1>;
|
|
mediatek,clk-mgr = <1>;
|
|
maximum-speed = "high-speed";
|
|
vbus-supply = <&otg_vbus>;
|
|
usb-role-switch;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_host {
|
|
status = "okay";
|
|
};
|
|
|
|
&u3phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c6 {
|
|
status = "okay";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mt6660: mt6660@34 {
|
|
status = "ok";
|
|
compatible = "mediatek,mt6660";
|
|
reg = <0x34>;
|
|
};
|
|
};
|
|
|
|
&gpio{
|
|
gpio_init_default = <0 0 0 0 1 1 1>,
|
|
<1 0 0 0 1 1 1>,
|
|
<2 0 1 0 0 0 1>,
|
|
<3 0 0 0 1 1 1>,
|
|
<4 0 0 0 1 0 1>,
|
|
<5 0 0 0 0 0 1>,
|
|
<6 0 0 0 1 0 1>,
|
|
<7 0 0 0 1 1 1>,
|
|
<8 0 0 0 1 1 1>,
|
|
<9 0 0 0 1 1 1>,
|
|
<10 0 0 0 1 0 1>,
|
|
<11 0 0 0 1 1 1>,
|
|
<12 0 1 0 0 0 0>,
|
|
<13 0 1 0 0 0 0>,
|
|
<14 0 1 0 0 0 0>,
|
|
<15 0 1 0 0 0 0>,
|
|
<16 7 0 0 1 0 0>,
|
|
<17 7 1 0 0 0 0>,
|
|
<18 7 0 0 1 0 0>,
|
|
<19 7 0 0 1 0 0>,
|
|
<20 7 0 0 1 0 0>,
|
|
<21 3 1 0 0 0 0>,
|
|
<22 0 1 1 0 0 0>,
|
|
<23 0 1 0 0 0 0>,
|
|
<24 0 1 0 0 0 0>,
|
|
<25 4 0 0 1 0 0>,
|
|
<26 0 1 0 0 0 0>,
|
|
<28 1 0 0 1 1 1>,
|
|
<29 1 0 0 1 1 1>,
|
|
<30 0 1 0 0 0 0>,
|
|
<31 0 1 0 0 0 0>,
|
|
<32 0 1 0 0 0 0>,
|
|
<33 0 0 0 1 0 0>,
|
|
<34 0 1 0 0 0 0>,
|
|
<35 0 0 0 1 0 0>,
|
|
<36 0 1 1 0 0 0>,
|
|
<37 6 0 0 1 0 0>,
|
|
<38 6 1 0 0 0 0>,
|
|
<39 6 0 0 1 0 0>,
|
|
<40 6 0 0 1 0 0>,
|
|
<41 6 0 0 1 0 0>,
|
|
<42 1 1 0 0 0 0>,
|
|
<43 1 0 0 1 0 0>,
|
|
<44 0 1 0 0 0 0>,
|
|
<45 1 0 0 1 1 1>,
|
|
<46 1 0 0 1 1 1>,
|
|
<47 1 0 0 1 0 0>,
|
|
<48 1 1 0 0 0 0>,
|
|
<49 1 1 0 0 0 0>,
|
|
<50 1 1 0 0 0 0>,
|
|
<51 1 0 0 1 1 1>,
|
|
<52 1 0 0 1 1 1>,
|
|
<53 1 0 0 1 1 0>,
|
|
<54 1 1 0 0 0 0>,
|
|
<55 1 0 0 1 1 1>,
|
|
<56 1 0 0 1 1 1>,
|
|
<57 0 0 0 1 0 0>,
|
|
<58 0 0 0 1 0 0>,
|
|
<59 1 0 0 1 1 0>,
|
|
<60 1 0 0 1 1 0>,
|
|
<61 2 0 0 1 1 1>,
|
|
<62 2 0 0 1 1 1>,
|
|
<63 2 0 0 1 0 0>,
|
|
<64 2 1 0 0 0 0>,
|
|
<65 2 1 0 0 0 0>,
|
|
<66 2 1 0 0 0 0>,
|
|
<67 1 1 0 0 0 1>,
|
|
<68 1 1 0 0 0 1>,
|
|
<69 0 0 0 1 1 1>,
|
|
<70 1 0 0 1 0 0>,
|
|
<71 1 1 0 0 0 1>,
|
|
<72 1 0 0 1 0 0>,
|
|
<73 3 0 0 1 0 0>,
|
|
<74 3 0 0 1 0 0>,
|
|
<75 1 0 0 1 0 0>,
|
|
<76 1 0 0 1 0 0>,
|
|
<77 1 0 0 1 0 0>,
|
|
<78 1 0 0 1 0 0>,
|
|
<79 1 0 0 1 0 0>,
|
|
<80 1 0 0 1 0 0>,
|
|
<81 1 0 0 1 0 0>,
|
|
<82 1 0 0 1 0 0>,
|
|
<83 1 0 0 1 0 0>,
|
|
<84 1 0 0 1 0 0>,
|
|
<85 1 0 0 1 0 0>,
|
|
<86 1 0 0 1 0 0>,
|
|
<87 1 0 0 1 0 0>,
|
|
<88 1 0 0 1 0 0>,
|
|
<89 1 0 0 1 0 0>,
|
|
<90 1 0 0 1 0 0>,
|
|
<91 1 0 0 1 0 0>,
|
|
<92 1 0 0 1 0 0>,
|
|
<93 1 0 0 1 0 0>,
|
|
<94 1 0 0 1 0 0>,
|
|
<95 1 0 0 1 0 0>,
|
|
<96 1 0 0 1 0 0>,
|
|
<97 1 0 0 1 0 0>,
|
|
<98 1 0 0 1 0 0>,
|
|
<99 1 0 0 1 0 0>,
|
|
<100 1 0 0 1 0 0>,
|
|
<101 1 0 0 1 0 0>,
|
|
<102 1 0 0 1 0 0>,
|
|
<103 1 0 0 1 0 0>,
|
|
<104 1 0 0 1 0 0>,
|
|
<105 1 0 0 1 0 0>,
|
|
<106 1 0 0 1 0 0>,
|
|
<107 1 0 0 1 0 0>,
|
|
<108 1 0 0 1 0 0>,
|
|
<109 1 0 0 1 0 0>,
|
|
<110 1 0 0 1 1 1>,
|
|
<111 1 0 0 1 1 1>,
|
|
<112 1 0 0 1 1 1>,
|
|
<113 1 0 0 1 1 1>,
|
|
<114 0 1 0 0 0 0>,
|
|
<115 0 1 0 0 0 0>,
|
|
<116 1 1 0 0 0 0>,
|
|
<117 1 1 0 0 0 0>,
|
|
<118 0 1 0 0 0 0>,
|
|
<119 0 1 0 0 0 0>,
|
|
<120 1 1 0 0 0 0>,
|
|
<121 1 1 0 0 0 0>,
|
|
<122 0 1 0 0 0 0>,
|
|
<123 0 1 0 0 0 0>,
|
|
<124 0 1 0 0 0 0>,
|
|
<125 0 1 0 0 0 0>,
|
|
<126 0 1 0 0 0 0>,
|
|
<127 1 0 0 1 0 0>,
|
|
<128 1 0 0 1 1 1>,
|
|
<129 1 1 0 0 0 1>,
|
|
<130 1 1 0 0 0 1>,
|
|
<131 1 1 0 0 0 1>,
|
|
<132 1 1 0 0 0 1>,
|
|
<133 1 0 0 1 1 1>,
|
|
<134 1 1 0 0 0 1>,
|
|
<135 1 0 0 1 1 1>,
|
|
<136 1 0 0 1 1 1>,
|
|
<137 1 0 0 1 1 1>,
|
|
<138 1 0 0 1 1 1>,
|
|
<139 1 0 0 1 1 1>,
|
|
<140 1 0 0 1 1 1>,
|
|
<141 1 0 0 1 1 1>,
|
|
<142 1 1 0 0 0 0>,
|
|
<143 1 1 0 0 0 1>,
|
|
<144 1 1 0 0 0 1>,
|
|
<145 1 1 0 0 0 1>,
|
|
<146 1 0 0 1 0 1>,
|
|
<147 0 1 0 0 0 0>,
|
|
<148 0 0 0 1 0 0>,
|
|
<149 0 0 0 1 0 0>,
|
|
<150 1 1 0 0 0 0>,
|
|
<151 1 1 0 0 0 0>,
|
|
<152 0 0 0 1 0 0>,
|
|
<153 0 0 0 1 0 0>,
|
|
<154 0 0 0 1 0 0>,
|
|
<155 0 0 0 1 0 0>,
|
|
<156 1 1 0 0 0 0>,
|
|
<157 1 1 0 0 0 0>,
|
|
<158 1 1 0 0 0 0>,
|
|
<159 1 1 0 0 0 0>,
|
|
<160 1 1 0 0 0 0>,
|
|
<161 1 1 0 0 0 0>,
|
|
<162 1 1 0 0 0 0>,
|
|
<163 1 1 0 0 0 0>,
|
|
<164 1 1 0 0 0 0>,
|
|
<165 1 1 0 0 0 0>,
|
|
<166 1 1 0 0 0 0>,
|
|
<179 1 0 0 1 0 0>,
|
|
<180 1 0 0 1 0 0>,
|
|
<181 1 1 0 0 0 0>,
|
|
<182 1 1 0 0 0 0>,
|
|
<183 1 1 0 0 0 0>,
|
|
<184 1 0 0 1 0 0>,
|
|
<185 1 1 0 0 0 0>,
|
|
<186 1 0 0 1 0 0>,
|
|
<187 1 1 0 0 0 0>,
|
|
<188 1 0 0 1 0 1>,
|
|
<189 1 1 0 0 0 1>,
|
|
<190 1 1 0 0 0 1>,
|
|
<191 1 1 0 0 0 1>,
|
|
<192 1 1 0 0 0 1>,
|
|
<193 1 0 0 1 0 1>,
|
|
<194 1 0 0 1 0 1>,
|
|
<195 0 1 0 0 0 0>,
|
|
<196 1 1 0 0 0 0>,
|
|
<197 0 1 0 0 0 0>,
|
|
<198 1 0 0 1 1 1>,
|
|
<199 1 0 0 1 1 1>,
|
|
<200 1 0 0 1 1 0>,
|
|
<201 1 1 0 0 0 0>,
|
|
<202 0 1 0 0 0 0>,
|
|
<203 0 0 0 1 0 0>,
|
|
<204 0 0 0 1 0 0>,
|
|
<205 0 0 0 1 0 0>,
|
|
<206 0 0 0 1 0 0>,
|
|
<207 0 0 0 1 0 0>,
|
|
<208 0 0 0 1 0 0>,
|
|
<209 0 0 0 1 0 0>;
|
|
};
|
|
|
|
/* CONSYS GPIO standardization */
|
|
&pio {
|
|
consys_pins_default: consys_default {
|
|
};
|
|
gpslna_pins_init: gpslna@0 {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
|
|
slew-rate = <0>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
gpslna_pins_oh: gpslna@1 {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
|
|
slew-rate = <1>;
|
|
output-high;
|
|
};
|
|
};
|
|
gpslna_pins_ol: gpslna@2 {
|
|
pins_cmd_dat {
|
|
pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
|
|
slew-rate = <1>;
|
|
output-low;
|
|
};
|
|
};
|
|
};
|
|
&consys {
|
|
pinctrl-names = "default",
|
|
"gps_lna_state_init",
|
|
"gps_lna_state_oh",
|
|
"gps_lna_state_ol";
|
|
pinctrl-0 = <&consys_pins_default>;
|
|
pinctrl-1 = <&gpslna_pins_init>;
|
|
pinctrl-2 = <&gpslna_pins_oh>;
|
|
pinctrl-3 = <&gpslna_pins_ol>;
|
|
status = "okay";
|
|
};
|
|
/* CONSYS end */
|
|
|
|
&bat_gm30 {
|
|
extcon = <&mt6360_chg>;
|
|
charger = <&mt6360_chg>;
|
|
};
|
|
|
|
/* MD SIM GPIO */
|
|
&gpio_usage_mapping {
|
|
compatible = "mediatek,gpio_usage_mapping";
|
|
GPIO_FDD_BAND_SUPPORT_DETECT_1ST_PIN = <&pio 5 0>;
|
|
GPIO_SIM1_SIO = <&pio 128 0>;
|
|
GPIO_SIM1_SRST = <&pio 129 0>;
|
|
GPIO_SIM1_SCLK = <&pio 130 0>;
|
|
GPIO_SIM2_SCLK = <&pio 131 0>;
|
|
GPIO_SIM2_SRST = <&pio 132 0>;
|
|
GPIO_SIM2_SIO = <&pio 133 0>;
|
|
GPIO_SIM1_HOT_PLUG = <&pio 140 0>;
|
|
GPIO_SIM2_HOT_PLUG = <&pio 141 0>;
|
|
};
|
|
|
|
&md1_sim1_hot_plug_eint {
|
|
compatible = "mediatek,md1_sim1_hot_plug_eint-eint";
|
|
interrupts = <0 4>;
|
|
debounce = <0 50000>;
|
|
dedicated = <0 0>;
|
|
src_pin = <0 1>;
|
|
sockettype = <0 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&md1_sim2_hot_plug_eint {
|
|
compatible = "mediatek,md1_sim2_hot_plug_eint-eint";
|
|
interrupts = <1 4>;
|
|
debounce = <1 50000>;
|
|
dedicated = <1 0>;
|
|
src_pin = <1 2>;
|
|
sockettype = <1 0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&md_auxadc {
|
|
io-channels = <&auxadc 2>,
|
|
<&pmic_auxadc AUXADC_BATADC>;
|
|
};
|