252 lines
5 KiB
Plaintext
Executable file
252 lines
5 KiB
Plaintext
Executable file
/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#if 0
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#if 0
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&${ese_check_parent} {
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ese_check_default: check_default {
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pins_cmd_dat {
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(${ese_check}), 0)>;
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input-enable;
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bias-disable;
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};
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};
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};
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#endif
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&${ese_spi_parent} {
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ese_spi_bus: ese_spi_bus {
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pins_cmd_dat {
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/* spi func is 2, but this can be different by AP */
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_miso}), 2)>,
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<MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_mosi}), 2)>,
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<MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_cs}), 2)>,
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<MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_clk}), 2)>;
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bias-disable;
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};
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};
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ese_spi_bus_suspend: ese_spi_bus_suspend {
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pins_cmd_dat {
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/* spi func is 2, but this can be different by AP */
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_miso}), 0)>,
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<MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_mosi}), 0)>,
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<MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_clk}), 0)>;
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input-enable;
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bias-pull-down;
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};
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};
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/*need cs pin controlled by ese driver*/
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ese_spi_cs: ese_spi_cs {
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pins_cmd_dat {
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_cs}), 0)>;
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output-high;
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bias-disable;
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};
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};
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ese_spi_cs_suspend: ese_spi_cs_suspend {
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pins_cmd_dat {
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(${ese_spi_cs}), 0)>;
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output-high;
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bias-disable;
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};
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};
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};
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&${ese_spi} {
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status = "ok";
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pinctrl-names = "ese_active", "ese_suspend";
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pinctrl-0 = <&ese_spi_bus>;
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pinctrl-1 = <&ese_spi_bus_suspend &ese_spi_cs_suspend>;
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ese_spi@0 {
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compatible = "ese_p3";
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reg = <0>;
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spi-max-frequency = <7000000>;
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#if 0
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ese-det-gpio = <SEC_GPIO_REF(${ese_check}) 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&ese_check_default>;
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#endif
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#if 0
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p3-vdd-supply = <&${ese_pvdd_ldo}>;
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#endif
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/*need cs pin controlled by ese driver*/
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/*ese_p3,cs-gpio = <SEC_GPIO_REF(${ese_spi_cs}) 0>;*/
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};
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};
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#if 0
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/ {
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fragment@ese_platform {
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target-path = "/";
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__overlay__ {
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ese_platform {
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compatible = "p3_platform";
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};
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};
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};
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};
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#endif
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#endif
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&pio {
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nfc_ven: nfc_ven {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,107), 0)>;
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output-high;
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bias-disable;
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};
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};
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ven_nc: ven_nc {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,107), 0)>;
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input-enable;
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bias-pull-down;
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};
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};
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};
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&pio {
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nfc_firm: nfc_firm {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,108), 0)>;
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output-low;
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bias-disable;
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};
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};
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firm_nc: firm_nc {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,108), 0)>;
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input-enable;
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bias-pull-down;
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};
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};
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};
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&pio {
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nfc_clk_req: nfc_clk_req {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,13), 0)>;
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input-enable;
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bias-pull-down;
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};
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};
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clk_req_nc: clk_req_nc {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,13), 0)>;
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input-enable;
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bias-pull-down;
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};
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};
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};
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&pio {
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nfc_irq: nfc_irq {
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pins_cmd_dat {
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,11), 0)>;
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input-enable;
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bias-pull-down;
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};
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};
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irq_nc: irq_nc {
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pins_cmd_dat {
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,11), 0)>;
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input-enable;
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bias-pull-down;
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};
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};
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};
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#if 1
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&pio {
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nfc_check: nfc_check {
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pins_cmd_dat {
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,90), 0)>;
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input-enable;
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bias-disable;
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};
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};
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};
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#endif
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#if 0
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&${sw_parent} {
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nfc_sw: nfc_sw {
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pins_cmd_dat {
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(${sw_gpio}), 0)>;
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output-low;
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bias-disable;
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};
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};
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sw_nc: sw_nc {
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pins_cmd_dat {
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(${sw_gpio}), 0)>;
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input-enable;
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bias-pull-down;
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};
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};
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};
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#endif
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&i2c3 {
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status = "ok";
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clock-frequency = <400000>;
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mediatek,use-open-drain;
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sec_nfc: sec-nfc@27 {
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compatible = "sec-nfc";
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reg = <0x27>;
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interrupt-parent = <&pio>;
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interrupts = <SEC_GPIO_NUM(AP,pio,11) IRQ_TYPE_EDGE_RISING
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SEC_GPIO_NUM(AP,pio,11) 0>;
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sec-nfc,irq-gpio = <SEC_GPIO_REF(AP,pio,11) 0>;
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sec-nfc,ven-gpio = <SEC_GPIO_REF(AP,pio,107) 0>;
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sec-nfc,firm-gpio = <SEC_GPIO_REF(AP,pio,108) 0>;
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sec-nfc,clk_req-gpio = <SEC_GPIO_REF(AP,pio,13) 0>;
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#if 1
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nfc_pvdd-supply = <&mt_pmic_vfp_ldo_reg>;
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#endif
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#if 1
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sec-nfc,check_nfc = <SEC_GPIO_REF(AP,pio,90) 0>;
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#endif
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#if 0
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sec-nfc,coldreset-gpio = <SEC_GPIO_REF(${ese_reset}) 0>;
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#endif
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sec-nfc,clk_req_wake;
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sec-nfc,ldo_control;
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/* sec-nfc,pvdd-gpio = <&pio 154 0>;*/
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#if 0
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sec-nfc,sw-gpio = <SEC_GPIO_REF(${sw_gpio}) 0>;
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#endif
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sec-nfc,bootloader_ver = <6>;
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/*sec-nfc,irq_all_trigger;*/
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pinctrl-names = "default", "nfc_nc";
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pinctrl-0 = <&nfc_ven &nfc_firm &nfc_clk_req &nfc_irq
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#if 1
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&nfc_check
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#endif
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#if 0
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&nfc_sw
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#endif
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>;
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pinctrl-1 = <&ven_nc &firm_nc &clk_req_nc &irq_nc
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#if 0
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&sw_nc
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#endif
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>;
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};
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};
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