132 lines
3.1 KiB
Plaintext
Executable file
132 lines
3.1 KiB
Plaintext
Executable file
/*
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* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&pio {
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btp_sleep: btp_sleep_enable {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,121), 0)>;
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bias-pull-down;
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drive-strength = <1>;
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};
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};
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btp_ldo_en: btp_ldo_enable {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,96), 0)>;
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bias-pull-down;
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drive-strength = <1>;
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};
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};
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spi5_set_miso: set_miso {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,100), 1)>;
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drive-strength = <4>;
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};
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};
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spi5_set_cs: set_cs {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,99), 1)>;
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drive-strength = <4>;
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};
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};
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spi5_set_mosi: set_mosi {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,101), 1)>;
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drive-strength = <4>;
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};
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};
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spi5_set_clk: set_clk {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,98), 1)>;
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drive-strength = <4>;
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};
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};
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spi5_clr_miso: clr_miso {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,100), 0)>;
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slew-rate = <0>;
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bias-pull-down;
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input-enable;
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drive-strength = <1>;
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};
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};
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spi5_clr_cs: clr_cs {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,99), 0)>;
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slew-rate = <0>;
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bias-pull-down;
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output-low;
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drive-strength = <1>;
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};
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};
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spi5_clr_mosi: clr_mosi {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,101), 0)>;
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slew-rate = <0>;
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bias-pull-down;
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output-low;
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drive-strength = <1>;
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};
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};
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spi5_clr_clk: clr_clk {
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pins_cmd_dat{
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pinmux = <MTK_PINMUX(SEC_GPIO_NUM(AP,pio,98), 0)>;
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slew-rate = <0>;
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bias-pull-down;
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output-low;
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drive-strength = <1>;
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};
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};
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};
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#if defined(CONFIG_SEC_FACTORY) || !1
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&spi5 {
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status = "okay";
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max-dma = <0x40000>;
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#else
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&smd {
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#endif
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#address-cells = <1>;
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#size-cells = <0>;
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etspi-spi@0 {
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compatible = "etspi,el7xx";
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reg = <0x00>;
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spi-max-frequency = <25000000>;
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#if !defined(CONFIG_SEC_FACTORY) && 1
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clocks = <&topckgen_clk CLK_TOP_MAINPLL_D5_D4>,
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<&topckgen_clk CLK_TOP_SPI_SEL>,
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<&infracfg_ao_clk CLK_IFRAO_SPI5>;
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clock-names = "parent-clk", "sel-clk", "spi-clk";
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#endif
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pinctrl-names = "default", "pins_poweron", "pins_poweroff";
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pinctrl-0 = <&btp_sleep &btp_ldo_en>;
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pinctrl-1 = <&spi5_set_miso &spi5_set_cs &spi5_set_mosi &spi5_set_clk>;
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pinctrl-2 = <&spi5_clr_miso &spi5_clr_cs &spi5_clr_mosi &spi5_clr_clk>;
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gpio-controller;
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#gpio-cells = <2>;
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etspi-sleepPin = <SEC_GPIO_REF(AP,pio,121) 0>;
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etspi-ldoPin = <SEC_GPIO_REF(AP,pio,96) 0>;
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etspi-chipid = "EL721";
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etspi-modelinfo = "A346";
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etspi-position = "11.69,0.00,9.10,9.10,14.80,14.80,12.00,12.00,5.00";
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etspi-rb = "588,-1,-1,FFFFFF";
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controller-data {
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mediatek,tckdly = <1>;
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};
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};
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};
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