132 lines
3.1 KiB
C
Executable file
132 lines
3.1 KiB
C
Executable file
/*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated
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*
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* This borrows heavily from powerpc version, which is:
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*
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* Derived from arch/i386/kernel/irq.c
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* Copyright (C) 1992 Linus Torvalds
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* Adapted from arch/i386 by Gary Thomas
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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* Updated and modified by Cort Dougan <cort@fsmlabs.com>
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* Copyright (C) 1996-2001 Cort Dougan
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* Adapted for Power Macintosh by Paul Mackerras
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* Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/slab.h>
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#include <linux/seq_file.h>
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#include <linux/radix-tree.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/interrupt.h>
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#include <linux/kernel_stat.h>
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#include <asm/megamod-pic.h>
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#include <asm/special_insns.h>
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unsigned long irq_err_count;
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static DEFINE_RAW_SPINLOCK(core_irq_lock);
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static void mask_core_irq(struct irq_data *data)
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{
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unsigned int prio = data->hwirq;
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raw_spin_lock(&core_irq_lock);
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and_creg(IER, ~(1 << prio));
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raw_spin_unlock(&core_irq_lock);
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}
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static void unmask_core_irq(struct irq_data *data)
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{
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unsigned int prio = data->hwirq;
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raw_spin_lock(&core_irq_lock);
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or_creg(IER, 1 << prio);
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raw_spin_unlock(&core_irq_lock);
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}
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static struct irq_chip core_chip = {
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.name = "core",
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.irq_mask = mask_core_irq,
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.irq_unmask = unmask_core_irq,
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};
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static int prio_to_virq[NR_PRIORITY_IRQS];
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asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs *regs)
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{
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struct pt_regs *old_regs = set_irq_regs(regs);
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irq_enter();
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generic_handle_irq(prio_to_virq[prio]);
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irq_exit();
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set_irq_regs(old_regs);
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}
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static struct irq_domain *core_domain;
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static int core_domain_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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if (hw < 4 || hw >= NR_PRIORITY_IRQS)
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return -EINVAL;
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prio_to_virq[hw] = virq;
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irq_set_status_flags(virq, IRQ_LEVEL);
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irq_set_chip_and_handler(virq, &core_chip, handle_level_irq);
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return 0;
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}
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static const struct irq_domain_ops core_domain_ops = {
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.map = core_domain_map,
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.xlate = irq_domain_xlate_onecell,
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};
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void __init init_IRQ(void)
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{
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struct device_node *np;
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/* Mask all priority IRQs */
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and_creg(IER, ~0xfff0);
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np = of_find_compatible_node(NULL, NULL, "ti,c64x+core-pic");
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if (np != NULL) {
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/* create the core host */
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core_domain = irq_domain_add_linear(np, NR_PRIORITY_IRQS,
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&core_domain_ops, NULL);
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if (core_domain)
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irq_set_default_host(core_domain);
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of_node_put(np);
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}
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printk(KERN_INFO "Core interrupt controller initialized\n");
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/* now we're ready for other SoC controllers */
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megamod_pic_init();
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/* Clear all general IRQ flags */
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set_creg(ICR, 0xfff0);
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}
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void ack_bad_irq(int irq)
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{
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printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);
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irq_err_count++;
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}
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
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return 0;
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}
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