152 lines
3.8 KiB
C
Executable file
152 lines
3.8 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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/***************************************************************************/
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/*
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* m528x.c -- platform support for ColdFire 528x based boards
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*
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* Sub-architcture dependent initialization code for the Freescale
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* 5280, 5281 and 5282 CPUs.
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*
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* Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfuart.h>
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#include <asm/mcfclk.h>
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/***************************************************************************/
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DEFINE_CLK(pll, "pll.0", MCF_CLK);
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DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
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DEFINE_CLK(mcfpit0, "mcfpit.0", MCF_CLK);
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DEFINE_CLK(mcfpit1, "mcfpit.1", MCF_CLK);
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DEFINE_CLK(mcfpit2, "mcfpit.2", MCF_CLK);
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DEFINE_CLK(mcfpit3, "mcfpit.3", MCF_CLK);
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DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
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DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
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DEFINE_CLK(mcfuart2, "mcfuart.2", MCF_BUSCLK);
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DEFINE_CLK(mcfqspi0, "mcfqspi.0", MCF_BUSCLK);
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DEFINE_CLK(fec0, "fec.0", MCF_BUSCLK);
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DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);
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struct clk *mcf_clks[] = {
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&clk_pll,
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&clk_sys,
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&clk_mcfpit0,
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&clk_mcfpit1,
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&clk_mcfpit2,
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&clk_mcfpit3,
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&clk_mcfuart0,
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&clk_mcfuart1,
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&clk_mcfuart2,
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&clk_mcfqspi0,
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&clk_fec0,
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&clk_mcfi2c0,
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NULL
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};
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/***************************************************************************/
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static void __init m528x_qspi_init(void)
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{
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#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
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/* setup Port QS for QSPI with gpio CS control */
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__raw_writeb(0x07, MCFGPIO_PQSPAR);
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#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
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}
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/***************************************************************************/
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static void __init m528x_i2c_init(void)
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{
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#if IS_ENABLED(CONFIG_I2C_IMX)
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u16 paspar;
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/* setup Port AS Pin Assignment Register for I2C */
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/* set PASPA0 to SCL and PASPA1 to SDA */
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paspar = readw(MCFGPIO_PASPAR);
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paspar |= 0xF;
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writew(paspar, MCFGPIO_PASPAR);
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#endif /* IS_ENABLED(CONFIG_I2C_IMX) */
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}
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/***************************************************************************/
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static void __init m528x_uarts_init(void)
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{
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u8 port;
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/* make sure PUAPAR is set for UART0 and UART1 */
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port = readb(MCFGPIO_PUAPAR);
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port |= 0x03 | (0x03 << 2);
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writeb(port, MCFGPIO_PUAPAR);
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}
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/***************************************************************************/
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static void __init m528x_fec_init(void)
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{
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u16 v16;
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/* Set multi-function pins to ethernet mode for fec0 */
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v16 = readw(MCFGPIO_PASPAR);
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writew(v16 | 0xf00, MCFGPIO_PASPAR);
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writeb(0xc0, MCFGPIO_PEHLPAR);
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}
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/***************************************************************************/
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#ifdef CONFIG_WILDFIRE
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void wildfire_halt(void)
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{
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writeb(0, 0x30000007);
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writeb(0x2, 0x30000007);
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}
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#endif
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#ifdef CONFIG_WILDFIREMOD
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void wildfiremod_halt(void)
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{
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printk(KERN_INFO "WildFireMod hibernating...\n");
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/* Set portE.5 to Digital IO */
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writew(readw(MCFGPIO_PEPAR) & ~(1 << (5 * 2)), MCFGPIO_PEPAR);
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/* Make portE.5 an output */
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writeb(readb(MCFGPIO_PDDR_E) | (1 << 5), MCFGPIO_PDDR_E);
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/* Now toggle portE.5 from low to high */
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writeb(readb(MCFGPIO_PODR_E) & ~(1 << 5), MCFGPIO_PODR_E);
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writeb(readb(MCFGPIO_PODR_E) | (1 << 5), MCFGPIO_PODR_E);
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printk(KERN_EMERG "Failed to hibernate. Halting!\n");
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}
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#endif
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void __init config_BSP(char *commandp, int size)
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{
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#ifdef CONFIG_WILDFIRE
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mach_halt = wildfire_halt;
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#endif
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#ifdef CONFIG_WILDFIREMOD
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mach_halt = wildfiremod_halt;
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#endif
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mach_sched_init = hw_timer_init;
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m528x_uarts_init();
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m528x_fec_init();
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m528x_qspi_init();
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m528x_i2c_init();
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}
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/***************************************************************************/
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