294 lines
9.7 KiB
C
Executable file
294 lines
9.7 KiB
C
Executable file
/*
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* Copyright (c) 2003-2012 Broadcom Corporation
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* All Rights Reserved
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the Broadcom
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* license below:
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY BROADCOM ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <asm/cpu-info.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <asm/cpu.h>
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#include <asm/mipsregs.h>
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#include <asm/netlogic/xlr/fmn.h>
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#include <asm/netlogic/xlr/xlr.h>
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#include <asm/netlogic/common.h>
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#include <asm/netlogic/haldefs.h>
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struct xlr_board_fmn_config xlr_board_fmn_config;
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static void __maybe_unused print_credit_config(struct xlr_fmn_info *fmn_info)
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{
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int bkt;
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pr_info("Bucket size :\n");
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pr_info("Station\t: Size\n");
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for (bkt = 0; bkt < 16; bkt++)
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pr_info(" %d %d %d %d %d %d %d %d\n",
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xlr_board_fmn_config.bucket_size[(bkt * 8) + 0],
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xlr_board_fmn_config.bucket_size[(bkt * 8) + 1],
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xlr_board_fmn_config.bucket_size[(bkt * 8) + 2],
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xlr_board_fmn_config.bucket_size[(bkt * 8) + 3],
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xlr_board_fmn_config.bucket_size[(bkt * 8) + 4],
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xlr_board_fmn_config.bucket_size[(bkt * 8) + 5],
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xlr_board_fmn_config.bucket_size[(bkt * 8) + 6],
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xlr_board_fmn_config.bucket_size[(bkt * 8) + 7]);
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pr_info("\n");
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pr_info("Credits distribution :\n");
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pr_info("Station\t: Size\n");
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for (bkt = 0; bkt < 16; bkt++)
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pr_info(" %d %d %d %d %d %d %d %d\n",
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fmn_info->credit_config[(bkt * 8) + 0],
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fmn_info->credit_config[(bkt * 8) + 1],
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fmn_info->credit_config[(bkt * 8) + 2],
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fmn_info->credit_config[(bkt * 8) + 3],
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fmn_info->credit_config[(bkt * 8) + 4],
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fmn_info->credit_config[(bkt * 8) + 5],
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fmn_info->credit_config[(bkt * 8) + 6],
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fmn_info->credit_config[(bkt * 8) + 7]);
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pr_info("\n");
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}
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static void check_credit_distribution(void)
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{
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struct xlr_board_fmn_config *cfg = &xlr_board_fmn_config;
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int bkt, n, total_credits, ncores;
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ncores = hweight32(nlm_current_node()->coremask);
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for (bkt = 0; bkt < 128; bkt++) {
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total_credits = 0;
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for (n = 0; n < ncores; n++)
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total_credits += cfg->cpu[n].credit_config[bkt];
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total_credits += cfg->gmac[0].credit_config[bkt];
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total_credits += cfg->gmac[1].credit_config[bkt];
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total_credits += cfg->dma.credit_config[bkt];
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total_credits += cfg->cmp.credit_config[bkt];
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total_credits += cfg->sae.credit_config[bkt];
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total_credits += cfg->xgmac[0].credit_config[bkt];
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total_credits += cfg->xgmac[1].credit_config[bkt];
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if (total_credits > cfg->bucket_size[bkt])
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pr_err("ERROR: Bucket %d: credits (%d) > size (%d)\n",
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bkt, total_credits, cfg->bucket_size[bkt]);
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}
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pr_info("Credit distribution complete.\n");
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}
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/**
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* Configure bucket size and credits for a device. 'size' is the size of
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* the buckets for the device. This size is distributed among all the CPUs
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* so that all of them can send messages to the device.
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*
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* The device is also given 'cpu_credits' to send messages to the CPUs
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*
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* @dev_info: FMN information structure for each devices
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* @start_stn_id: Starting station id of dev_info
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* @end_stn_id: End station id of dev_info
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* @num_buckets: Total number of buckets for den_info
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* @cpu_credits: Allowed credits to cpu for each devices pointing by dev_info
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* @size: Size of the each buckets in the device station
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*/
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static void setup_fmn_cc(struct xlr_fmn_info *dev_info, int start_stn_id,
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int end_stn_id, int num_buckets, int cpu_credits, int size)
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{
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int i, j, num_core, n, credits_per_cpu;
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struct xlr_fmn_info *cpu = xlr_board_fmn_config.cpu;
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num_core = hweight32(nlm_current_node()->coremask);
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dev_info->num_buckets = num_buckets;
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dev_info->start_stn_id = start_stn_id;
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dev_info->end_stn_id = end_stn_id;
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n = num_core;
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if (num_core == 3)
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n = 4;
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for (i = start_stn_id; i <= end_stn_id; i++) {
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xlr_board_fmn_config.bucket_size[i] = size;
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/* Dividing device credits equally to cpus */
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credits_per_cpu = size / n;
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for (j = 0; j < num_core; j++)
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cpu[j].credit_config[i] = credits_per_cpu;
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/* credits left to distribute */
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credits_per_cpu = size - (credits_per_cpu * num_core);
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/* distribute the remaining credits (if any), among cores */
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for (j = 0; (j < num_core) && (credits_per_cpu >= 4); j++) {
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cpu[j].credit_config[i] += 4;
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credits_per_cpu -= 4;
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}
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}
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/* Distributing cpu per bucket credits to devices */
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for (i = 0; i < num_core; i++) {
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for (j = 0; j < FMN_CORE_NBUCKETS; j++)
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dev_info->credit_config[(i * 8) + j] = cpu_credits;
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}
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}
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/*
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* Each core has 256 slots and 8 buckets,
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* Configure the 8 buckets each with 32 slots
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*/
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static void setup_cpu_fmninfo(struct xlr_fmn_info *cpu, int num_core)
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{
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int i, j;
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for (i = 0; i < num_core; i++) {
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cpu[i].start_stn_id = (8 * i);
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cpu[i].end_stn_id = (8 * i + 8);
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for (j = cpu[i].start_stn_id; j < cpu[i].end_stn_id; j++)
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xlr_board_fmn_config.bucket_size[j] = 32;
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}
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}
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/**
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* Setup the FMN details for each devices according to the device available
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* in each variant of XLR/XLS processor
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*/
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void xlr_board_info_setup(void)
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{
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struct xlr_fmn_info *cpu = xlr_board_fmn_config.cpu;
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struct xlr_fmn_info *gmac = xlr_board_fmn_config.gmac;
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struct xlr_fmn_info *xgmac = xlr_board_fmn_config.xgmac;
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struct xlr_fmn_info *dma = &xlr_board_fmn_config.dma;
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struct xlr_fmn_info *cmp = &xlr_board_fmn_config.cmp;
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struct xlr_fmn_info *sae = &xlr_board_fmn_config.sae;
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int processor_id, num_core;
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num_core = hweight32(nlm_current_node()->coremask);
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processor_id = read_c0_prid() & PRID_IMP_MASK;
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setup_cpu_fmninfo(cpu, num_core);
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switch (processor_id) {
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case PRID_IMP_NETLOGIC_XLS104:
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case PRID_IMP_NETLOGIC_XLS108:
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setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0,
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FMN_STNID_GMAC0_TX3, 8, 16, 32);
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setup_fmn_cc(dma, FMN_STNID_DMA_0,
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FMN_STNID_DMA_3, 4, 8, 64);
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setup_fmn_cc(sae, FMN_STNID_SEC0,
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FMN_STNID_SEC1, 2, 8, 128);
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break;
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case PRID_IMP_NETLOGIC_XLS204:
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case PRID_IMP_NETLOGIC_XLS208:
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setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0,
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FMN_STNID_GMAC0_TX3, 8, 16, 32);
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setup_fmn_cc(dma, FMN_STNID_DMA_0,
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FMN_STNID_DMA_3, 4, 8, 64);
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setup_fmn_cc(sae, FMN_STNID_SEC0,
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FMN_STNID_SEC1, 2, 8, 128);
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break;
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case PRID_IMP_NETLOGIC_XLS404:
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case PRID_IMP_NETLOGIC_XLS408:
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case PRID_IMP_NETLOGIC_XLS404B:
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case PRID_IMP_NETLOGIC_XLS408B:
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case PRID_IMP_NETLOGIC_XLS416B:
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case PRID_IMP_NETLOGIC_XLS608B:
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case PRID_IMP_NETLOGIC_XLS616B:
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setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0,
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FMN_STNID_GMAC0_TX3, 8, 8, 32);
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setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0,
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FMN_STNID_GMAC1_TX3, 8, 8, 32);
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setup_fmn_cc(dma, FMN_STNID_DMA_0,
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FMN_STNID_DMA_3, 4, 4, 64);
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setup_fmn_cc(cmp, FMN_STNID_CMP_0,
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FMN_STNID_CMP_3, 4, 4, 64);
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setup_fmn_cc(sae, FMN_STNID_SEC0,
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FMN_STNID_SEC1, 2, 8, 128);
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break;
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case PRID_IMP_NETLOGIC_XLS412B:
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setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0,
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FMN_STNID_GMAC0_TX3, 8, 8, 32);
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setup_fmn_cc(&gmac[1], FMN_STNID_GMAC1_FR_0,
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FMN_STNID_GMAC1_TX3, 8, 8, 32);
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setup_fmn_cc(dma, FMN_STNID_DMA_0,
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FMN_STNID_DMA_3, 4, 4, 64);
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setup_fmn_cc(cmp, FMN_STNID_CMP_0,
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FMN_STNID_CMP_3, 4, 4, 64);
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setup_fmn_cc(sae, FMN_STNID_SEC0,
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FMN_STNID_SEC1, 2, 8, 128);
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break;
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case PRID_IMP_NETLOGIC_XLR308:
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case PRID_IMP_NETLOGIC_XLR308C:
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setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0,
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FMN_STNID_GMAC0_TX3, 8, 16, 32);
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setup_fmn_cc(dma, FMN_STNID_DMA_0,
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FMN_STNID_DMA_3, 4, 8, 64);
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setup_fmn_cc(sae, FMN_STNID_SEC0,
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FMN_STNID_SEC1, 2, 4, 128);
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break;
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case PRID_IMP_NETLOGIC_XLR532:
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case PRID_IMP_NETLOGIC_XLR532C:
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case PRID_IMP_NETLOGIC_XLR516C:
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case PRID_IMP_NETLOGIC_XLR508C:
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setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0,
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FMN_STNID_GMAC0_TX3, 8, 16, 32);
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setup_fmn_cc(dma, FMN_STNID_DMA_0,
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FMN_STNID_DMA_3, 4, 8, 64);
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setup_fmn_cc(sae, FMN_STNID_SEC0,
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FMN_STNID_SEC1, 2, 4, 128);
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break;
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case PRID_IMP_NETLOGIC_XLR732:
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case PRID_IMP_NETLOGIC_XLR716:
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setup_fmn_cc(&xgmac[0], FMN_STNID_XMAC0_00_TX,
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FMN_STNID_XMAC0_15_TX, 8, 0, 32);
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setup_fmn_cc(&xgmac[1], FMN_STNID_XMAC1_00_TX,
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FMN_STNID_XMAC1_15_TX, 8, 0, 32);
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setup_fmn_cc(&gmac[0], FMN_STNID_GMAC0,
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FMN_STNID_GMAC0_TX3, 8, 24, 32);
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setup_fmn_cc(dma, FMN_STNID_DMA_0,
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FMN_STNID_DMA_3, 4, 4, 64);
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setup_fmn_cc(sae, FMN_STNID_SEC0,
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FMN_STNID_SEC1, 2, 4, 128);
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break;
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default:
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pr_err("Unknown CPU with processor ID [%d]\n", processor_id);
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pr_err("Error: Cannot initialize FMN credits.\n");
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}
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check_credit_distribution();
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#if 0 /* debug */
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print_credit_config(&cpu[0]);
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print_credit_config(&gmac[0]);
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#endif
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}
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