270 lines
6.2 KiB
C
Executable file
270 lines
6.2 KiB
C
Executable file
/*
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* Renesas Technology Europe SDK7786 Support.
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*
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* Copyright (C) 2010 Matt Fleming
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* Copyright (C) 2010 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/machine.h>
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#include <linux/smsc911x.h>
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#include <linux/i2c.h>
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#include <linux/irq.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <mach/fpga.h>
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#include <mach/irq.h>
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#include <asm/machvec.h>
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#include <asm/heartbeat.h>
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#include <asm/sizes.h>
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#include <asm/clock.h>
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#include <asm/reboot.h>
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#include <asm/smp-ops.h>
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static struct resource heartbeat_resource = {
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.start = 0x07fff8b0,
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.end = 0x07fff8b0 + sizeof(u16) - 1,
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.flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
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};
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static struct platform_device heartbeat_device = {
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.name = "heartbeat",
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.id = -1,
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.num_resources = 1,
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.resource = &heartbeat_resource,
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};
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/* Dummy supplies, where voltage doesn't matter */
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static struct regulator_consumer_supply dummy_supplies[] = {
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REGULATOR_SUPPLY("vddvario", "smsc911x"),
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REGULATOR_SUPPLY("vdd33a", "smsc911x"),
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};
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static struct resource smsc911x_resources[] = {
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[0] = {
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.name = "smsc911x-memory",
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.start = 0x07ffff00,
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.end = 0x07ffff00 + SZ_256 - 1,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.name = "smsc911x-irq",
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.start = evt2irq(0x2c0),
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.end = evt2irq(0x2c0),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct smsc911x_platform_config smsc911x_config = {
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
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.flags = SMSC911X_USE_32BIT,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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};
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static struct platform_device smsc911x_device = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(smsc911x_resources),
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.resource = smsc911x_resources,
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.dev = {
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.platform_data = &smsc911x_config,
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},
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};
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static struct resource smbus_fpga_resource = {
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.start = 0x07fff9e0,
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.end = 0x07fff9e0 + SZ_32 - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device smbus_fpga_device = {
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.name = "i2c-sdk7786",
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.id = 0,
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.num_resources = 1,
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.resource = &smbus_fpga_resource,
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};
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static struct resource smbus_pcie_resource = {
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.start = 0x07fffc30,
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.end = 0x07fffc30 + SZ_32 - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device smbus_pcie_device = {
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.name = "i2c-sdk7786",
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.id = 1,
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.num_resources = 1,
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.resource = &smbus_pcie_resource,
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};
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static struct i2c_board_info __initdata sdk7786_i2c_devices[] = {
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{
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I2C_BOARD_INFO("max6900", 0x68),
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},
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};
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static struct platform_device *sh7786_devices[] __initdata = {
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&heartbeat_device,
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&smsc911x_device,
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&smbus_fpga_device,
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&smbus_pcie_device,
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};
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static int sdk7786_i2c_setup(void)
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{
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unsigned int tmp;
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/*
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* Hand over I2C control to the FPGA.
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*/
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tmp = fpga_read_reg(SBCR);
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tmp &= ~SCBR_I2CCEN;
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tmp |= SCBR_I2CMEN;
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fpga_write_reg(tmp, SBCR);
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return i2c_register_board_info(0, sdk7786_i2c_devices,
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ARRAY_SIZE(sdk7786_i2c_devices));
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}
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static int __init sdk7786_devices_setup(void)
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{
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int ret;
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ret = platform_add_devices(sh7786_devices, ARRAY_SIZE(sh7786_devices));
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if (unlikely(ret != 0))
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return ret;
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return sdk7786_i2c_setup();
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}
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device_initcall(sdk7786_devices_setup);
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static int sdk7786_mode_pins(void)
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{
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return fpga_read_reg(MODSWR);
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}
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/*
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* FPGA-driven PCIe clocks
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*
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* Historically these include the oscillator, clock B (slots 2/3/4) and
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* clock A (slot 1 and the CPU clock). Newer revs of the PCB shove
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* everything under a single PCIe clocks enable bit that happens to map
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* to the same bit position as the oscillator bit for earlier FPGA
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* versions.
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*
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* Given that the legacy clocks have the side-effect of shutting the CPU
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* off through the FPGA along with the PCI slots, we simply leave them in
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* their initial state and don't bother registering them with the clock
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* framework.
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*/
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static int sdk7786_pcie_clk_enable(struct clk *clk)
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{
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fpga_write_reg(fpga_read_reg(PCIECR) | PCIECR_CLKEN, PCIECR);
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return 0;
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}
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static void sdk7786_pcie_clk_disable(struct clk *clk)
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{
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fpga_write_reg(fpga_read_reg(PCIECR) & ~PCIECR_CLKEN, PCIECR);
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}
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static struct sh_clk_ops sdk7786_pcie_clk_ops = {
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.enable = sdk7786_pcie_clk_enable,
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.disable = sdk7786_pcie_clk_disable,
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};
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static struct clk sdk7786_pcie_clk = {
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.ops = &sdk7786_pcie_clk_ops,
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};
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static struct clk_lookup sdk7786_pcie_cl = {
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.con_id = "pcie_plat_clk",
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.clk = &sdk7786_pcie_clk,
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};
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static int sdk7786_clk_init(void)
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{
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struct clk *clk;
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int ret;
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/*
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* Only handle the EXTAL case, anyone interfacing a crystal
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* resonator will need to provide their own input clock.
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*/
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if (test_mode_pin(MODE_PIN9))
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return -EINVAL;
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clk = clk_get(NULL, "extal");
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if (IS_ERR(clk))
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return PTR_ERR(clk);
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ret = clk_set_rate(clk, 33333333);
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clk_put(clk);
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/*
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* Setup the FPGA clocks.
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*/
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ret = clk_register(&sdk7786_pcie_clk);
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if (unlikely(ret)) {
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pr_err("FPGA clock registration failed\n");
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return ret;
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}
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clkdev_add(&sdk7786_pcie_cl);
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return 0;
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}
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static void sdk7786_restart(char *cmd)
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{
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fpga_write_reg(0xa5a5, SRSTR);
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}
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static void sdk7786_power_off(void)
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{
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fpga_write_reg(fpga_read_reg(PWRCR) | PWRCR_PDWNREQ, PWRCR);
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/*
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* It can take up to 20us for the R8C to do its job, back off and
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* wait a bit until we've been shut off. Even though newer FPGA
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* versions don't set the ACK bit, the latency issue remains.
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*/
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while ((fpga_read_reg(PWRCR) & PWRCR_PDWNACK) == 0)
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cpu_sleep();
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}
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/* Initialize the board */
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static void __init sdk7786_setup(char **cmdline_p)
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{
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pr_info("Renesas Technology Europe SDK7786 support:\n");
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regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
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sdk7786_fpga_init();
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sdk7786_nmi_init();
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pr_info("\tPCB revision:\t%d\n", fpga_read_reg(PCBRR) & 0xf);
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machine_ops.restart = sdk7786_restart;
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pm_power_off = sdk7786_power_off;
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register_smp_ops(&shx3_smp_ops);
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}
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/*
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* The Machine Vector
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*/
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static struct sh_machine_vector mv_sdk7786 __initmv = {
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.mv_name = "SDK7786",
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.mv_setup = sdk7786_setup,
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.mv_mode_pins = sdk7786_mode_pins,
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.mv_clk_init = sdk7786_clk_init,
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.mv_init_irq = sdk7786_init_irq,
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};
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