c05564c4d8
Android 13
278 lines
7.9 KiB
C
Executable file
278 lines
7.9 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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/* sysfs.c: Topology sysfs support code for sparc64.
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*
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* Copyright (C) 2007 David S. Miller <davem@davemloft.net>
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*/
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#include <linux/sched.h>
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#include <linux/device.h>
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#include <linux/cpu.h>
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#include <linux/smp.h>
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#include <linux/percpu.h>
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#include <linux/init.h>
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#include <asm/cpudata.h>
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#include <asm/hypervisor.h>
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#include <asm/spitfire.h>
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static DEFINE_PER_CPU(struct hv_mmu_statistics, mmu_stats) __attribute__((aligned(64)));
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#define SHOW_MMUSTAT_ULONG(NAME) \
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static ssize_t show_##NAME(struct device *dev, \
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struct device_attribute *attr, char *buf) \
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{ \
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struct hv_mmu_statistics *p = &per_cpu(mmu_stats, dev->id); \
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return sprintf(buf, "%lu\n", p->NAME); \
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} \
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static DEVICE_ATTR(NAME, 0444, show_##NAME, NULL)
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SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_8k_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_8k_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_64k_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_64k_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_4mb_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_4mb_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctx0_256mb_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctx0_256mb_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_8k_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_8k_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_64k_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_64k_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_4mb_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_4mb_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_hits_ctxnon0_256mb_tte);
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SHOW_MMUSTAT_ULONG(immu_tsb_ticks_ctxnon0_256mb_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_8k_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_8k_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_64k_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_64k_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_4mb_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_4mb_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctx0_256mb_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctx0_256mb_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_8k_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_8k_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_64k_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_64k_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_4mb_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_4mb_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_hits_ctxnon0_256mb_tte);
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SHOW_MMUSTAT_ULONG(dmmu_tsb_ticks_ctxnon0_256mb_tte);
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static struct attribute *mmu_stat_attrs[] = {
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&dev_attr_immu_tsb_hits_ctx0_8k_tte.attr,
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&dev_attr_immu_tsb_ticks_ctx0_8k_tte.attr,
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&dev_attr_immu_tsb_hits_ctx0_64k_tte.attr,
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&dev_attr_immu_tsb_ticks_ctx0_64k_tte.attr,
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&dev_attr_immu_tsb_hits_ctx0_4mb_tte.attr,
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&dev_attr_immu_tsb_ticks_ctx0_4mb_tte.attr,
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&dev_attr_immu_tsb_hits_ctx0_256mb_tte.attr,
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&dev_attr_immu_tsb_ticks_ctx0_256mb_tte.attr,
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&dev_attr_immu_tsb_hits_ctxnon0_8k_tte.attr,
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&dev_attr_immu_tsb_ticks_ctxnon0_8k_tte.attr,
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&dev_attr_immu_tsb_hits_ctxnon0_64k_tte.attr,
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&dev_attr_immu_tsb_ticks_ctxnon0_64k_tte.attr,
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&dev_attr_immu_tsb_hits_ctxnon0_4mb_tte.attr,
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&dev_attr_immu_tsb_ticks_ctxnon0_4mb_tte.attr,
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&dev_attr_immu_tsb_hits_ctxnon0_256mb_tte.attr,
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&dev_attr_immu_tsb_ticks_ctxnon0_256mb_tte.attr,
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&dev_attr_dmmu_tsb_hits_ctx0_8k_tte.attr,
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&dev_attr_dmmu_tsb_ticks_ctx0_8k_tte.attr,
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&dev_attr_dmmu_tsb_hits_ctx0_64k_tte.attr,
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&dev_attr_dmmu_tsb_ticks_ctx0_64k_tte.attr,
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&dev_attr_dmmu_tsb_hits_ctx0_4mb_tte.attr,
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&dev_attr_dmmu_tsb_ticks_ctx0_4mb_tte.attr,
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&dev_attr_dmmu_tsb_hits_ctx0_256mb_tte.attr,
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&dev_attr_dmmu_tsb_ticks_ctx0_256mb_tte.attr,
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&dev_attr_dmmu_tsb_hits_ctxnon0_8k_tte.attr,
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&dev_attr_dmmu_tsb_ticks_ctxnon0_8k_tte.attr,
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&dev_attr_dmmu_tsb_hits_ctxnon0_64k_tte.attr,
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&dev_attr_dmmu_tsb_ticks_ctxnon0_64k_tte.attr,
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&dev_attr_dmmu_tsb_hits_ctxnon0_4mb_tte.attr,
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&dev_attr_dmmu_tsb_ticks_ctxnon0_4mb_tte.attr,
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&dev_attr_dmmu_tsb_hits_ctxnon0_256mb_tte.attr,
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&dev_attr_dmmu_tsb_ticks_ctxnon0_256mb_tte.attr,
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NULL,
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};
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static struct attribute_group mmu_stat_group = {
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.attrs = mmu_stat_attrs,
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.name = "mmu_stats",
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};
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static long read_mmustat_enable(void *data __maybe_unused)
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{
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unsigned long ra = 0;
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sun4v_mmustat_info(&ra);
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return ra != 0;
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}
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static long write_mmustat_enable(void *data)
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{
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unsigned long ra, orig_ra, *val = data;
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if (*val)
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ra = __pa(&per_cpu(mmu_stats, smp_processor_id()));
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else
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ra = 0UL;
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return sun4v_mmustat_conf(ra, &orig_ra);
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}
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static ssize_t show_mmustat_enable(struct device *s,
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struct device_attribute *attr, char *buf)
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{
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long val = work_on_cpu(s->id, read_mmustat_enable, NULL);
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return sprintf(buf, "%lx\n", val);
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}
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static ssize_t store_mmustat_enable(struct device *s,
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struct device_attribute *attr, const char *buf,
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size_t count)
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{
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unsigned long val;
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long err;
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int ret;
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ret = sscanf(buf, "%lu", &val);
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if (ret != 1)
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return -EINVAL;
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err = work_on_cpu(s->id, write_mmustat_enable, &val);
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if (err)
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return -EIO;
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return count;
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}
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static DEVICE_ATTR(mmustat_enable, 0644, show_mmustat_enable, store_mmustat_enable);
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static int mmu_stats_supported;
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static int register_mmu_stats(struct device *s)
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{
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if (!mmu_stats_supported)
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return 0;
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device_create_file(s, &dev_attr_mmustat_enable);
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return sysfs_create_group(&s->kobj, &mmu_stat_group);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static void unregister_mmu_stats(struct device *s)
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{
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if (!mmu_stats_supported)
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return;
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sysfs_remove_group(&s->kobj, &mmu_stat_group);
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device_remove_file(s, &dev_attr_mmustat_enable);
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}
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#endif
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#define SHOW_CPUDATA_ULONG_NAME(NAME, MEMBER) \
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static ssize_t show_##NAME(struct device *dev, \
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struct device_attribute *attr, char *buf) \
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{ \
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cpuinfo_sparc *c = &cpu_data(dev->id); \
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return sprintf(buf, "%lu\n", c->MEMBER); \
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}
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#define SHOW_CPUDATA_UINT_NAME(NAME, MEMBER) \
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static ssize_t show_##NAME(struct device *dev, \
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struct device_attribute *attr, char *buf) \
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{ \
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cpuinfo_sparc *c = &cpu_data(dev->id); \
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return sprintf(buf, "%u\n", c->MEMBER); \
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}
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SHOW_CPUDATA_ULONG_NAME(clock_tick, clock_tick);
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SHOW_CPUDATA_UINT_NAME(l1_dcache_size, dcache_size);
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SHOW_CPUDATA_UINT_NAME(l1_dcache_line_size, dcache_line_size);
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SHOW_CPUDATA_UINT_NAME(l1_icache_size, icache_size);
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SHOW_CPUDATA_UINT_NAME(l1_icache_line_size, icache_line_size);
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SHOW_CPUDATA_UINT_NAME(l2_cache_size, ecache_size);
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SHOW_CPUDATA_UINT_NAME(l2_cache_line_size, ecache_line_size);
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static struct device_attribute cpu_core_attrs[] = {
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__ATTR(clock_tick, 0444, show_clock_tick, NULL),
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__ATTR(l1_dcache_size, 0444, show_l1_dcache_size, NULL),
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__ATTR(l1_dcache_line_size, 0444, show_l1_dcache_line_size, NULL),
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__ATTR(l1_icache_size, 0444, show_l1_icache_size, NULL),
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__ATTR(l1_icache_line_size, 0444, show_l1_icache_line_size, NULL),
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__ATTR(l2_cache_size, 0444, show_l2_cache_size, NULL),
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__ATTR(l2_cache_line_size, 0444, show_l2_cache_line_size, NULL),
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};
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static DEFINE_PER_CPU(struct cpu, cpu_devices);
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static int register_cpu_online(unsigned int cpu)
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{
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struct cpu *c = &per_cpu(cpu_devices, cpu);
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struct device *s = &c->dev;
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int i;
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for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
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device_create_file(s, &cpu_core_attrs[i]);
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register_mmu_stats(s);
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return 0;
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}
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static int unregister_cpu_online(unsigned int cpu)
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{
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#ifdef CONFIG_HOTPLUG_CPU
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struct cpu *c = &per_cpu(cpu_devices, cpu);
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struct device *s = &c->dev;
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int i;
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unregister_mmu_stats(s);
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for (i = 0; i < ARRAY_SIZE(cpu_core_attrs); i++)
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device_remove_file(s, &cpu_core_attrs[i]);
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#endif
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return 0;
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}
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static void __init check_mmu_stats(void)
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{
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unsigned long dummy1, err;
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if (tlb_type != hypervisor)
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return;
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err = sun4v_mmustat_info(&dummy1);
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if (!err)
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mmu_stats_supported = 1;
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}
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static void register_nodes(void)
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{
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#ifdef CONFIG_NUMA
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int i;
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for (i = 0; i < MAX_NUMNODES; i++)
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register_one_node(i);
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#endif
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}
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static int __init topology_init(void)
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{
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int cpu, ret;
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register_nodes();
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check_mmu_stats();
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for_each_possible_cpu(cpu) {
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struct cpu *c = &per_cpu(cpu_devices, cpu);
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register_cpu(c, cpu);
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}
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ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "sparc/topology:online",
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register_cpu_online, unregister_cpu_online);
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WARN_ON(ret < 0);
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return 0;
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}
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subsys_initcall(topology_init);
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