c05564c4d8
Android 13
99 lines
2.1 KiB
ArmAsm
Executable file
99 lines
2.1 KiB
ArmAsm
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* locks.S: SMP low-level lock primitives on Sparc.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1998 Anton Blanchard (anton@progsoc.uts.edu.au)
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* Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
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*/
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#include <asm/ptrace.h>
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#include <asm/psr.h>
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#include <asm/smp.h>
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#include <asm/spinlock.h>
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#include <asm/export.h>
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.text
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.align 4
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/* Read/writer locks, as usual this is overly clever to make it
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* as fast as possible.
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*/
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/* caches... */
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___rw_read_enter_spin_on_wlock:
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orcc %g2, 0x0, %g0
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be,a ___rw_read_enter
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ldstub [%g1 + 3], %g2
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b ___rw_read_enter_spin_on_wlock
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ldub [%g1 + 3], %g2
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___rw_read_try_spin_on_wlock:
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andcc %g2, 0xff, %g0
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be,a ___rw_read_try
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ldstub [%g1 + 3], %g2
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xnorcc %g2, 0x0, %o0 /* if g2 is ~0, set o0 to 0 and bugger off */
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bne,a ___rw_read_enter_spin_on_wlock
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ld [%g1], %g2
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retl
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mov %g4, %o7
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___rw_read_exit_spin_on_wlock:
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orcc %g2, 0x0, %g0
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be,a ___rw_read_exit
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ldstub [%g1 + 3], %g2
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b ___rw_read_exit_spin_on_wlock
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ldub [%g1 + 3], %g2
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___rw_write_enter_spin_on_wlock:
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orcc %g2, 0x0, %g0
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be,a ___rw_write_enter
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ldstub [%g1 + 3], %g2
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b ___rw_write_enter_spin_on_wlock
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ld [%g1], %g2
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.globl ___rw_read_enter
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EXPORT_SYMBOL(___rw_read_enter)
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___rw_read_enter:
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orcc %g2, 0x0, %g0
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bne,a ___rw_read_enter_spin_on_wlock
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ldub [%g1 + 3], %g2
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ld [%g1], %g2
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add %g2, 1, %g2
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st %g2, [%g1]
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retl
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mov %g4, %o7
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.globl ___rw_read_exit
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EXPORT_SYMBOL(___rw_read_exit)
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___rw_read_exit:
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orcc %g2, 0x0, %g0
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bne,a ___rw_read_exit_spin_on_wlock
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ldub [%g1 + 3], %g2
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ld [%g1], %g2
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sub %g2, 0x1ff, %g2
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st %g2, [%g1]
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retl
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mov %g4, %o7
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.globl ___rw_read_try
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EXPORT_SYMBOL(___rw_read_try)
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___rw_read_try:
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orcc %g2, 0x0, %g0
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bne ___rw_read_try_spin_on_wlock
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ld [%g1], %g2
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add %g2, 1, %g2
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st %g2, [%g1]
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set 1, %o1
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retl
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mov %g4, %o7
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.globl ___rw_write_enter
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EXPORT_SYMBOL(___rw_write_enter)
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___rw_write_enter:
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orcc %g2, 0x0, %g0
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bne ___rw_write_enter_spin_on_wlock
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ld [%g1], %g2
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andncc %g2, 0xff, %g0
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bne,a ___rw_write_enter_spin_on_wlock
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stb %g0, [%g1 + 3]
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retl
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mov %g4, %o7
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