c05564c4d8
Android 13
82 lines
2.3 KiB
C
Executable file
82 lines
2.3 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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#ifndef _ASM_X86_CPU_ENTRY_AREA_H
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#define _ASM_X86_CPU_ENTRY_AREA_H
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#include <linux/percpu-defs.h>
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#include <asm/processor.h>
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#include <asm/intel_ds.h>
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/*
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* cpu_entry_area is a percpu region that contains things needed by the CPU
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* and early entry/exit code. Real types aren't used for all fields here
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* to avoid circular header dependencies.
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*
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* Every field is a virtual alias of some other allocated backing store.
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* There is no direct allocation of a struct cpu_entry_area.
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*/
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struct cpu_entry_area {
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char gdt[PAGE_SIZE];
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/*
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* The GDT is just below entry_stack and thus serves (on x86_64) as
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* a a read-only guard page.
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*/
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struct entry_stack_page entry_stack_page;
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/*
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* On x86_64, the TSS is mapped RO. On x86_32, it's mapped RW because
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* we need task switches to work, and task switches write to the TSS.
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*/
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struct tss_struct tss;
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char entry_trampoline[PAGE_SIZE];
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#ifdef CONFIG_X86_64
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/*
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* Exception stacks used for IST entries.
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*
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* In the future, this should have a separate slot for each stack
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* with guard pages between them.
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*/
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char exception_stacks[(N_EXCEPTION_STACKS - 1) * EXCEPTION_STKSZ + DEBUG_STKSZ];
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#endif
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#ifdef CONFIG_CPU_SUP_INTEL
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/*
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* Per CPU debug store for Intel performance monitoring. Wastes a
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* full page at the moment.
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*/
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struct debug_store cpu_debug_store;
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/*
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* The actual PEBS/BTS buffers must be mapped to user space
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* Reserve enough fixmap PTEs.
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*/
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struct debug_store_buffers cpu_debug_buffers;
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#endif
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};
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#define CPU_ENTRY_AREA_SIZE (sizeof(struct cpu_entry_area))
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#define CPU_ENTRY_AREA_TOT_SIZE (CPU_ENTRY_AREA_SIZE * NR_CPUS)
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DECLARE_PER_CPU(struct cpu_entry_area *, cpu_entry_area);
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extern void setup_cpu_entry_areas(void);
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extern void cea_set_pte(void *cea_vaddr, phys_addr_t pa, pgprot_t flags);
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#define CPU_ENTRY_AREA_RO_IDT CPU_ENTRY_AREA_BASE
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#define CPU_ENTRY_AREA_PER_CPU (CPU_ENTRY_AREA_RO_IDT + PAGE_SIZE)
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#define CPU_ENTRY_AREA_RO_IDT_VADDR ((void *)CPU_ENTRY_AREA_RO_IDT)
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#define CPU_ENTRY_AREA_MAP_SIZE \
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(CPU_ENTRY_AREA_PER_CPU + CPU_ENTRY_AREA_TOT_SIZE - CPU_ENTRY_AREA_BASE)
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extern struct cpu_entry_area *get_cpu_entry_area(int cpu);
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static inline struct entry_stack *cpu_entry_stack(int cpu)
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{
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return &get_cpu_entry_area(cpu)->entry_stack_page.stack;
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}
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#endif
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