207 lines
5.8 KiB
C
Executable file
207 lines
5.8 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef _CLK_MT6877_FMETER_H
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#define _CLK_MT6877_FMETER_H
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/* generate from clock_table.xlsx from TOPCKGEN DE */
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/* CKGEN Part */
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#define FM_AXI_CK 1
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#define FM_SPM_CK 2
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#define FM_SCP_CK 3
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#define FM_BUS_CK 4
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#define FM_DISP0_CK 5
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#define FM_MDP0_CK 6
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#define FM_IMG1_CK 7
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#define FM_IPE_CK 8
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#define FM_DPE_CK 9
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#define FM_CAM_CK 10
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#define FM_CCU_CK 11
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#define FM_DSP_CK 12
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#define FM_DSP1_CK 13
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#define FM_DSP2_CK 14
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#define FM_DSP4_CK 16
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#define FM_DSP7_CK 19
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#define FM_FCAMTG_CK 20
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#define FM_FCAMTG2_CK 21
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#define FM_FCAMTG3_CK 22
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#define FM_FCAMTG4_CK 23
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#define FM_FCAMTG5_CK 24
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#define FM_FUART_CK 25
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#define FM_SPI_CK 26
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#define FM_MSDC5HCLK_CK 27
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#define FM_MSDC50_0_CK 28
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#define FM_MSDC30_1_CK 29
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#define FM_AUDIO_CK 30
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#define FM_AUD_INTBUS_CK 31
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#define FM_FPWRAP_ULPOSC_CK 32
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#define FM_ATB_CK 33
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#define FM_SSPM_CK 34
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#define FM_FDISP_PWM_CK 36
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#define FM_FUSB_CK 37
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#define FM_FSSUSB_XHCI_CK 38
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#define FM_I2C_CK 41
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#define FM_FSENINF_CK 42
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#define FM_FSENINF1_CK 43
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#define FM_FSENINF2_CK 44
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#define FM_FSENINF3_CK 45
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#define FM_DXCC_CK 46
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#define FM_AUD_ENGEN1_CK 47
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#define FM_AUD_ENGEN2_CK 48
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#define FM_AES_UFSFDE_CK 49
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#define FM_UFS_CK 50
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#define FM_AUD_1_CK 51
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#define FM_AUD_2_CK 52
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#define FM_ADSP_CK 53
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#define FM_DPMAIF_MAIN_CK 54
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#define FM_VENC_CK 55
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#define FM_VDEC_CK 56
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#define FM_CAMTM_CK 57
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#define FM_PWM_CK 58
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#define FM_AUDIO_H_CK 59
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#define FM_MCUPM_CK 60
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#define FM_SPMI_M_MST_CK 62
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#define FM_DVFSRC_CK 63
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/* ABIST Part */
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#define FM_ADSPPLL_CKDIV_CK 1
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#define FM_APLL1_CKDIV_CK 2
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#define FM_APLL2_CKDIV_CK 3
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#define FM_APPLLGP_MON_FM_CK 4
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#define FM_ARMPLL_BL_CKDIV_CK 7
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#define FM_ARMPLL_LL_CKDIV_CK 9
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#define FM_USBPLL_CKDIV_CK 10
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#define FM_CCIPLL_CKDIV_CK 11
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#define FM_CSI0A_CDPHY_DELAYCAL_CK 12
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#define FM_CSI0B_CDPHY_DELAYCAL_CK 13
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#define FM_CSI1A_DPHY_DELAYCAL_CK 14
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#define FM_CSI1B_DPHY_DELAYCAL_CK 15
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#define FM_CSI2A_DPHY_DELAYCAL_CK 16
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#define FM_CSI2B_DPHY_DELAYCAL_CK 17
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#define FM_CSI3A_DPHY_DELAYCAL_CK 18
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#define FM_CSI3B_DPHY_DELAYCAL_CK 19
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#define FM_DSI0_LNTC_DSICLK 20
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#define FM_DSI0_MPPLL_TST_CK 21
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#define FM_MAINPLL_CKDIV_CK 24
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#define FM_MDPLL_FS26M_GUIDE 25
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#define FM_MMPLL_CKDIV_CK 27
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#define FM_MMPLL_D3_CK 28
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#define FM_MPLL_CKDIV_CK 29
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#define FM_MSDCPLL_CKDIV_CK 30
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#define FM_RCLRPLL_DIV4_CK 31
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#define FM_RPHYPLL_DIV4_CK 33
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#define FM_EMI_CKDIV_CK 34
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#define FM_TVDPLL_CKDIV_CK 35
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#define FM_ULPOSC2_CK 36
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#define FM_ULPOSC_CK 37
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#define FM_UNIVPLL_CKDIV_CK 38
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#define FM_USB20_192M_OPP_CK 39
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#define FM_UFS_MP_CLK2FREQ 41
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#define FM_WBG_DIG_BPLL_CK 42
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#define FM_WBG_DIG_WPLL_CK960 43
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#define FMEM_AFT_CH0 44
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#define FMEM_AFT_CH1 45
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#define FMEM_BFE_CH0 48
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#define FMEM_BFE_CH1 49
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#define FM_466M_FMEM_INFRASYS 50
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#define FM_MCUSYS_ARM_OUT_ALL 51
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#define FM_MSDC01_IN_CK 52
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#define FM_MSDC02_IN_CK 53
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#define FM_MSDC11_IN_CK 54
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#define FM_MSDC12_IN_CK 55
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#define FM_RTC32K_I 58
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#define FM_CKMON1_CK 60
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#define FM_CKMON2_CK 61
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#define FM_CKMON3_CK 62
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#define FM_CKMON4_CK 63
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/* ABIST2 Part */
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#define FM_APLL_I2S0_M_CK 1
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#define FM_APLL_I2S1_M_CK 2
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#define FM_APLL_I2S2_M_CK 3
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#define FM_APLL_I2S3_M_CK 4
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#define FM_APLL_I2S4_M_CK 5
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#define FM_APLL_I2S4_B_CK 6
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#define FM_APLL_I2S5_M_CK 7
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#define FM_APLL_I2S6_M_CK 8
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#define FM_APLL_I2S7_M_CK 9
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#define FM_APLL_I2S8_M_CK 10
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#define FM_APLL_I2S9_M_CK 11
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#define FM_MEM_SUB_CK 12
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#define FM_AES_MSDCFDE_CK 13
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#define FM_DSI_OCC_CK 15
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#define FM_UFS_MBIST_CK 16
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#define FM_AP2CONN_HOST_CK 17
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#define FM_MSDC_NEW_RX_CK 18
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#define FM_UNIPLL_SES_CK 19
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#define FM_F_ULPOSC_CK 20
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#define FM_F_ULPOSC_CORE_CK 21
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#define FM_SRCK_CK 22
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#define FM_SPMI_MST_32K_CK 23
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#define FM_MAIN_H728M_CK 24
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#define FM_MAIN_H546M_CK 25
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#define FM_MAIN_H436P8M_CK 26
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#define FM_MAIN_H364M_CK 27
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#define FM_MAIN_H312M_CK 28
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#define FM_UNIV_1248M_CK 29
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#define FM_UNIV_832M_CK 30
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#define FM_UNIV_624M_CK 31
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#define FM_UNIV_499M_CK 32
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#define FM_UNIV_416M_CK 33
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#define FM_UNIV_356P6M_CK 34
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#define FM_MMPLL_D3_CK_2 35
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#define FM_MMPLL_D4_CK 36
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#define FM_MMPLL_D5_CK 37
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#define FM_MMPLL_D6_CK 38
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#define FM_MMPLL_D7_CK 39
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#define FM_MMPLL_D9_CK 40
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#define FM_ROSC_OUT_FREQ 41
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#define FM_ALVTS_TO_PLLGP_MON_L1 42
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#define FM_ALVTS_TO_PLLGP_MON_L2 43
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#define FM_ALVTS_TO_PLLGP_MON_L3 44
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#define FM_ALVTS_TO_PLLGP_MON_L4 45
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#define FM_ALVTS_TO_PLLGP_MON_L5 46
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#define FM_ALVTS_TO_PLLGP_MON_L6 47
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#define FM_ALVTS_TO_PLLGP_MON_L7 48
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#define FM_ALVTS_TO_PLLGP_MON_L8 49
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enum fm_sys_id {
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FM_GPU_PLL_CTRL = 0,
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FM_APU_PLL_CTRL = 1,
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FM_SYS_NUM = 2,
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};
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struct fm_pwr_sta {
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unsigned int ofs;
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unsigned int msk;
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};
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struct fm_subsys {
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unsigned int id;
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const char *name;
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void __iomem *base;
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unsigned int con0;
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unsigned int con1;
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struct fm_pwr_sta pwr_sta;
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};
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#define FM_MFGPLL1 ((FM_GPU_PLL_CTRL << 8) | 0)
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#define FM_MFGPLL2 ((FM_GPU_PLL_CTRL << 8) | 1)
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#define FM_MFGPLL3 ((FM_GPU_PLL_CTRL << 8) | 2)
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#define FM_MFGPLL4 ((FM_GPU_PLL_CTRL << 8) | 3)
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#define FM_APUPLL1 ((FM_APU_PLL_CTRL << 8) | 0)
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#define FM_APUPLL2 ((FM_APU_PLL_CTRL << 8) | 1)
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#define FM_APUPLL3 ((FM_APU_PLL_CTRL << 8) | 2)
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#define FM_APUPLL4 ((FM_APU_PLL_CTRL << 8) | 3)
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extern unsigned int mt_get_ckgen_freq(unsigned int ID);
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extern unsigned int mt_get_abist_freq(unsigned int ID);
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extern unsigned int mt_get_abist2_freq(unsigned int ID);
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extern unsigned int mt_get_subsys_freq(unsigned int ID);
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extern const struct fmeter_clk *get_fmeter_clks(void);
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extern int mt_subsys_freq_register(struct fm_subsys *fm, unsigned int size);
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#endif /* _CLK_MT6877_FMETER_H */
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