c05564c4d8
Android 13
166 lines
2.9 KiB
C
Executable file
166 lines
2.9 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2021 MediaTek Inc.
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* Author: Owen Chen <owen.chen@mediatek.com>
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/seq_file.h>
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#ifdef CONFIG_MTK_DEVAPC
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#include <mt-plat/devapc_public.h>
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#endif
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#include "clkdbg.h"
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#include "clkchk.h"
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#include "clkchk-mt6893.h"
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#include "clk-fmeter.h"
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#include <clk-mux.h>
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static const struct regname *get_all_regnames(void)
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{
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return get_mt6893_all_reg_names();
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}
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/*
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* clkdbg dump all fmeter clks
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*/
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static const struct fmeter_clk *get_all_fmeter_clks(void)
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{
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return get_fmeter_clks();
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}
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static u32 fmeter_freq_op(const struct fmeter_clk *fclk)
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{
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if (fclk->type == ABIST)
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return mt_get_abist_freq(fclk->id);
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else if (fclk->type == CKGEN)
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return mt_get_ckgen_freq(fclk->id);
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return 0;
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}
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/*
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* clkdbg dump_clks
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*/
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static const char * const *get_all_clk_names(void)
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{
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return get_mt6893_all_clk_names();
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}
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/*
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* clkdbg pwr_status
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*/
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static const char * const *get_pwr_names(void)
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{
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static const char * const pwr_names[] = {
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[0] = "MD",
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[1] = "CONN",
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[2] = "MFG0",
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[3] = "MFG1",
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[4] = "MFG2",
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[5] = "MFG3",
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[6] = "MFG4",
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[7] = "MFG5",
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[8] = "MFG6",
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[9] = "INFRA",
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[10] = "SUB_INFRA",
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[11] = "DDRPHY",
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[12] = "ISP",
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[13] = "ISP2",
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[14] = "IPE",
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[15] = "VDEC",
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[16] = "VDEC2",
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[17] = "VEN",
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[18] = "VEN_CORE1",
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[19] = "MDP",
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[20] = "DISP",
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[21] = "AUDIO",
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[22] = "ADSP",
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[23] = "CAM",
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[24] = "CAM_RAWA",
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[25] = "CAM_RAWB",
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[26] = "CAM_RAWC",
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[27] = "DP_TX",
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[28] = "DDRPHY2",
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[29] = "(Reserved)",
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[30] = "(Reserved)",
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[31] = "(Reserved)",
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};
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return pwr_names;
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}
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/*
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* clkdbg setup clks
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*/
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void setup_provider_clk(struct provider_clk *pvdck)
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{
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static const struct {
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const char *pvdname;
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u32 pwr_mask;
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} pvd_pwr_mask[] = {
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};
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int i;
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const char *pvdname = pvdck->provider_name;
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if (!pvdname)
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return;
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for (i = 0; i < ARRAY_SIZE(pvd_pwr_mask); i++) {
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if (strcmp(pvdname, pvd_pwr_mask[i].pvdname) == 0) {
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pvdck->pwr_mask = pvd_pwr_mask[i].pwr_mask;
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return;
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}
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}
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}
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/*
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* pwr stat check functions
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*/
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static bool is_pwr_on(struct provider_clk *pvdck)
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{
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struct clk *c = pvdck->ck;
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struct clk_hw *c_hw = __clk_get_hw(c);
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return clk_hw_is_prepared(c_hw);
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}
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/*
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* init functions
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*/
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static struct clkdbg_ops clkdbg_mt6893_ops = {
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.get_all_fmeter_clks = get_all_fmeter_clks,
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.prepare_fmeter = NULL,
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.unprepare_fmeter = NULL,
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.fmeter_freq = fmeter_freq_op,
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.get_all_regnames = get_all_regnames,
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.get_all_clk_names = get_all_clk_names,
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.get_pwr_names = get_pwr_names,
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.setup_provider_clk = setup_provider_clk,
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.is_pwr_on = is_pwr_on,
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};
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static void __init init_custom_cmds(void)
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{
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static const struct cmd_fn cmds[] = {
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{}
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};
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set_custom_cmds(cmds);
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}
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static int __init clkdbg_mt6893_init(void)
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{
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init_custom_cmds();
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set_clkdbg_ops(&clkdbg_mt6893_ops);
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return 0;
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}
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subsys_initcall(clkdbg_mt6893_init);
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