150 lines
3.6 KiB
C
Executable file
150 lines
3.6 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2017, Intel Corporation
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*/
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#include <linux/slab.h>
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#include <linux/clk-provider.h>
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#include "stratix10-clk.h"
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#include "clk.h"
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#define CLK_MGR_FREE_SHIFT 16
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#define CLK_MGR_FREE_MASK 0x7
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#define SWCTRLBTCLKSEN_SHIFT 8
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#define to_periph_clk(p) container_of(p, struct socfpga_periph_clk, hw.hw)
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static unsigned long clk_peri_c_clk_recalc_rate(struct clk_hw *hwclk,
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unsigned long parent_rate)
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{
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struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
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unsigned long div = 1;
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u32 val;
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val = readl(socfpgaclk->hw.reg);
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val &= GENMASK(SWCTRLBTCLKSEN_SHIFT - 1, 0);
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parent_rate /= val;
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return parent_rate / div;
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}
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static unsigned long clk_peri_cnt_clk_recalc_rate(struct clk_hw *hwclk,
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unsigned long parent_rate)
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{
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struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
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unsigned long div = 1;
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if (socfpgaclk->fixed_div) {
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div = socfpgaclk->fixed_div;
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} else {
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if (socfpgaclk->hw.reg)
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div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1);
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}
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return parent_rate / div;
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}
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static u8 clk_periclk_get_parent(struct clk_hw *hwclk)
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{
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struct socfpga_periph_clk *socfpgaclk = to_periph_clk(hwclk);
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u32 clk_src, mask;
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u8 parent;
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if (socfpgaclk->bypass_reg) {
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mask = (0x1 << socfpgaclk->bypass_shift);
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parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
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socfpgaclk->bypass_shift);
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} else {
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clk_src = readl(socfpgaclk->hw.reg);
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parent = (clk_src >> CLK_MGR_FREE_SHIFT) &
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CLK_MGR_FREE_MASK;
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}
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return parent;
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}
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static const struct clk_ops peri_c_clk_ops = {
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.recalc_rate = clk_peri_c_clk_recalc_rate,
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.get_parent = clk_periclk_get_parent,
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};
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static const struct clk_ops peri_cnt_clk_ops = {
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.recalc_rate = clk_peri_cnt_clk_recalc_rate,
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.get_parent = clk_periclk_get_parent,
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};
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struct clk *s10_register_periph(const char *name, const char *parent_name,
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const char * const *parent_names,
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u8 num_parents, unsigned long flags,
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void __iomem *reg, unsigned long offset)
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{
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struct clk *clk;
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struct socfpga_periph_clk *periph_clk;
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struct clk_init_data init = {};
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periph_clk = kzalloc(sizeof(*periph_clk), GFP_KERNEL);
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if (WARN_ON(!periph_clk))
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return NULL;
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periph_clk->hw.reg = reg + offset;
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init.name = name;
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init.ops = &peri_c_clk_ops;
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init.flags = flags;
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init.num_parents = num_parents;
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init.parent_names = parent_names ? parent_names : &parent_name;
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periph_clk->hw.hw.init = &init;
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clk = clk_register(NULL, &periph_clk->hw.hw);
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if (WARN_ON(IS_ERR(clk))) {
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kfree(periph_clk);
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return NULL;
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}
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return clk;
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}
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struct clk *s10_register_cnt_periph(const char *name, const char *parent_name,
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const char * const *parent_names,
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u8 num_parents, unsigned long flags,
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void __iomem *regbase, unsigned long offset,
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u8 fixed_divider, unsigned long bypass_reg,
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unsigned long bypass_shift)
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{
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struct clk *clk;
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struct socfpga_periph_clk *periph_clk;
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struct clk_init_data init = {};
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periph_clk = kzalloc(sizeof(*periph_clk), GFP_KERNEL);
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if (WARN_ON(!periph_clk))
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return NULL;
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if (offset)
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periph_clk->hw.reg = regbase + offset;
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else
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periph_clk->hw.reg = NULL;
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if (bypass_reg)
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periph_clk->bypass_reg = regbase + bypass_reg;
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else
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periph_clk->bypass_reg = NULL;
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periph_clk->bypass_shift = bypass_shift;
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periph_clk->fixed_div = fixed_divider;
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init.name = name;
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init.ops = &peri_cnt_clk_ops;
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init.flags = flags;
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init.num_parents = num_parents;
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init.parent_names = parent_names ? parent_names : &parent_name;
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periph_clk->hw.hw.init = &init;
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clk = clk_register(NULL, &periph_clk->hw.hw);
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if (WARN_ON(IS_ERR(clk))) {
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kfree(periph_clk);
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return NULL;
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}
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return clk;
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}
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