161 lines
5.5 KiB
C
Executable file
161 lines
5.5 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __MTK_DISP_AAL_H__
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#define __MTK_DISP_AAL_H__
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#include <linux/uaccess.h>
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#include <drm/mediatek_drm.h>
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#define AAL_SERVICE_FORCE_UPDATE 0x1
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/*******************************/
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/* field definition */
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/* ------------------------------------------------------------- */
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/* AAL */
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#define DISP_AAL_EN (0x000)
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#define DISP_AAL_RESET (0x004)
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#define DISP_AAL_INTEN (0x008)
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#define DISP_AAL_INTSTA (0x00c)
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#define DISP_AAL_STATUS (0x010)
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#define DISP_AAL_CFG (0x020)
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#define DISP_AAL_IN_CNT (0x024)
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#define DISP_AAL_OUT_CNT (0x028)
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#define DISP_AAL_CHKSUM (0x02c)
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#define DISP_AAL_SIZE (0x030)
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#define DISP_AAL_SHADOW_CTL (0x0B0)
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#define DISP_AAL_DUMMY_REG (0x0c0)
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#define DISP_AAL_SHADOW_CTRL (0x0f0)
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#define AAL_BYPASS_SHADOW BIT(0)
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#define AAL_READ_WRK_REG BIT(2)
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#define DISP_AAL_MAX_HIST_CONFIG_00 (0x204)
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#define DISP_AAL_CABC_00 (0x20c)
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#define DISP_AAL_CABC_02 (0x214)
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#define DISP_AAL_CABC_04 (0x21c)
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#define DISP_AAL_STATUS_00 (0x224)
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/* 00 ~ 32: max histogram */
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#define DISP_AAL_STATUS_32 (0x2a4)
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/* bit 8: dre_gain_force_en */
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#define DISP_AAL_DRE_GAIN_FILTER_00 (0x354)
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#define DISP_AAL_DRE_FLT_FORCE(idx) \
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(0x358 + (idx) * 4)
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#define DISP_AAL_DRE_CRV_CAL_00 (0x344)
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#define DISP_AAL_DRE_MAPPING_00 (0x3b4)
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#define DISP_AAL_CABC_GAINLMT_TBL(idx) \
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(0x410 + (idx) * 4)
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#define DISP_AAL_DBG_CFG_MAIN (0x45c)
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/* DRE 3.0 */
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#define DISP_AAL_CFG_MAIN (0x200)
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#define DISP_AAL_SRAM_CFG (0x0c4)
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#define DISP_AAL_SRAM_STATUS (0x0c8)
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#define DISP_AAL_SRAM_RW_IF_0 (0x0cc)
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#define DISP_AAL_SRAM_RW_IF_1 (0x0d0)
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#define DISP_AAL_SRAM_RW_IF_2 (0x0d4)
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#define DISP_AAL_SRAM_RW_IF_3 (0x0d8)
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#define DISP_AAL_WIN_X_MAIN (0x460)
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#define DISP_AAL_WIN_Y_MAIN (0x464)
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#define DISP_AAL_DRE_BLOCK_INFO_00 (0x468)
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#define DISP_AAL_DRE_BLOCK_INFO_01 (0x46c)
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#define DISP_AAL_DRE_BLOCK_INFO_02 (0x470)
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#define DISP_AAL_DRE_BLOCK_INFO_03 (0x474)
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#define DISP_AAL_DRE_BLOCK_INFO_04 (0x478)
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#define DISP_AAL_DRE_CHROMA_HIST_00 (0x480)
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#define DISP_AAL_DRE_CHROMA_HIST_01 (0x484)
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#define DISP_AAL_DRE_ALPHA_BLEND_00 (0x488)
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#define DISP_AAL_DRE_BITPLUS_00 (0x48c)
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#define DISP_AAL_DRE_BITPLUS_01 (0x490)
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#define DISP_AAL_DRE_BITPLUS_02 (0x494)
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#define DISP_AAL_DRE_BITPLUS_03 (0x498)
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#define DISP_AAL_DRE_BITPLUS_04 (0x49c)
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#define DISP_AAL_DRE_BLOCK_INFO_05 (0x4b4)
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#define DISP_AAL_DRE_BLOCK_INFO_06 (0x4b8)
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#define DISP_AAL_DUAL_PIPE_INFO_00 (0x4d0)
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#define DISP_AAL_DUAL_PIPE_INFO_01 (0x4d4)
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#define DISP_AAL_OUTPUT_SIZE (0x4d8)
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#define DISP_AAL_OUTPUT_OFFSET (0x4dc)
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#define DISP_Y_HISTOGRAM_00 (0x504)
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#define DISP_AAL_DRE_BLOCK_INFO_07 (0x0f8)
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#define MDP_AAL_TILE_00 (0x4EC)
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#define MDP_AAL_TILE_01 (0x4F0)
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#define MDP_AAL_TILE_02 (0x0F4)
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#define MDP_AAL_DUAL_PIPE00 (0x500)
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#define MDP_AAL_DUAL_PIPE08 (0x544)
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#define AAL_DRE30_GAIN_REGISTER_NUM (544)
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#define AAL_DRE30_HIST_REGISTER_NUM (768)
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#define AAL_U32_PTR(x) ((unsigned int *)(unsigned long)x)
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#define aal_u32_handle_t unsigned long long
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enum AAL_ESS_UD_MODE {
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CONFIG_BY_CUSTOM_LIB = 0,
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CONFIG_TO_LCD = 1,
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CONFIG_TO_AMOLED = 2
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};
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enum AAL_DRE_MODE {
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DRE_EN_BY_CUSTOM_LIB = 0xFFFF,
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DRE_OFF = 0,
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DRE_ON = 1
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};
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enum AAL_ESS_MODE {
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ESS_EN_BY_CUSTOM_LIB = 0xFFFF,
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ESS_OFF = 0,
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ESS_ON = 1
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};
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enum AAL_ESS_LEVEL {
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ESS_LEVEL_BY_CUSTOM_LIB = 0xFFFF
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};
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enum DISP_AAL_REFRESH_LATENCY {
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AAL_REFRESH_17MS = 17,
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AAL_REFRESH_33MS = 33
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};
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struct DISP_DRE30_HIST {
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unsigned int aal0_dre_hist[AAL_DRE30_HIST_REGISTER_NUM];
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unsigned int aal1_dre_hist[AAL_DRE30_HIST_REGISTER_NUM];
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int dre_blk_x_num;
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int dre_blk_y_num;
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};
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struct DISP_DRE30_PARAM {
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unsigned int dre30_gain[AAL_DRE30_GAIN_REGISTER_NUM];
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};
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void disp_aal_debug(const char *opt);
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/* Provide for LED */
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void disp_aal_notify_backlight_changed(int bl_1024);
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void disp_aal_on_start_of_frame(void);
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/* AAL Control API in Kernel */
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void disp_aal_set_lcm_type(unsigned int panel_type);
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void disp_aal_set_ess_level(int level);
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void disp_aal_set_ess_en(int enable);
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void disp_aal_set_dre_en(int enable);
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int mtk_drm_ioctl_aal_eventctl(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int mtk_drm_ioctl_aal_get_hist(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int mtk_drm_ioctl_aal_init_reg(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int mtk_drm_ioctl_aal_init_dre30(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int mtk_drm_ioctl_aal_get_size(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int mtk_drm_ioctl_aal_set_param(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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#endif
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