c05564c4d8
Android 13
147 lines
4.6 KiB
C
Executable file
147 lines
4.6 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef _MT_GPUFREQ_H
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#define _MT_GPUFREQ_H
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#include <linux/module.h>
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#include <linux/clk.h>
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#define MAX_VCO_VALUE 3800000
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#define MIN_VCO_VALUE 1500000
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#define DIV2_MAX_FREQ 1900000
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#define DIV2_MIN_FREQ 750000
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#define DIV4_MAX_FREQ 950000
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/* #define DIV4_MIN_FREQ 375000 */
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#define DIV4_MIN_FREQ 250000
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#define DIV8_MAX_FREQ 475000
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#define DIV8_MIN_FREQ 187500
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#define DIV16_MAX_FREQ 237500
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#define DIV16_MIN_FREQ 93750
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#define TO_MHz_HEAD 100
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#define TO_MHz_TAIL 10
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#define ROUNDING_VALUE 5
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#define DDS_SHIFT 14
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#define POST_DIV_SHIFT 24
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#define POST_DIV_MASK 0x70000000
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#define GPUPLL_FIN 26
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#define BUCK_ON 1
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#define BUCK_OFF 0
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#define BUCK_ENFORCE_OFF 4
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enum post_div_order_enum {
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POST_DIV2 = 1,
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POST_DIV4,
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POST_DIV8,
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POST_DIV16,
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};
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struct mt_gpufreq_table_info {
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unsigned int gpufreq_khz;
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unsigned int gpufreq_volt;
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unsigned int gpufreq_vsram;
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unsigned int gpufreq_idx;
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};
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struct mt_gpufreq_power_table_info {
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unsigned int gpufreq_khz;
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unsigned int gpufreq_volt;
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unsigned int gpufreq_power;
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};
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struct mt_gpufreq_clk_t {
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struct clk *clk_mux; /* main clock for mfg setting */
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struct clk *clk_main_parent; /* substitution clock for mfg transient mux setting */
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struct clk *clk_sub_parent; /* substitution clock for mfg transient parent setting */
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};
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struct mt_gpufreq_pmic_t {
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struct regulator *reg_vproc; /* vproc regulator */
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struct regulator *reg_vsram; /* vproc sram regulator */
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struct regulator *reg_vcore; /* vproc sram regulator */
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};
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/*****************
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* extern function
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******************/
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extern int mt_gpufreq_state_set(int enabled);
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extern void mt_gpufreq_thermal_protect(unsigned int limited_power);
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extern unsigned int mt_gpufreq_get_cur_freq_index(void);
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extern unsigned int mt_gpufreq_get_cur_freq(void);
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extern unsigned int mt_gpufreq_get_cur_volt(void);
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extern unsigned int mt_gpufreq_get_dvfs_table_num(void);
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extern unsigned int mt_gpufreq_target(unsigned int idx);
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extern unsigned int mt_gpufreq_voltage_enable_set(unsigned int enable);
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extern unsigned int mt_gpufreq_voltage_lpm_set(unsigned int enable_lpm);
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extern unsigned int mt_gpufreq_update_volt(unsigned int pmic_volt[], unsigned int array_size);
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extern unsigned int mt_gpufreq_get_freq_by_idx(unsigned int idx);
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extern unsigned int mt_gpufreq_get_volt_by_idx(unsigned int idx);
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extern void mt_gpufreq_thermal_protect(unsigned int limited_power);
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extern void mt_gpufreq_restore_default_volt(void);
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extern void mt_gpufreq_enable_by_ptpod(void);
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extern void mt_gpufreq_disable_by_ptpod(void);
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extern unsigned int mt_gpufreq_get_max_power(void);
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extern unsigned int mt_gpufreq_get_min_power(void);
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extern unsigned int mt_gpufreq_get_thermal_limit_index(void);
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extern unsigned int mt_gpufreq_get_thermal_limit_freq(void);
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extern void mt_gpufreq_set_power_limit_by_pbm(unsigned int limited_power);
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extern unsigned int mt_gpufreq_get_leakage_mw(void);
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extern void mt_gpufreq_set_loading(unsigned int gpu_loading);
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extern int mt_gpufreq_get_cur_ceiling_idx(void);
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extern unsigned int mt_get_mfgclk_freq(void); /* Freq Meter API */
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extern unsigned int mt_get_ckgen_freq(unsigned int);
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extern u32 get_devinfo_with_index(u32 index);
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extern int mt_gpufreq_fan53555_init(void);
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#ifdef CONFIG_THERMAL
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extern int mtk_gpufreq_register(struct mt_gpufreq_power_table_info *freqs, int num);
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#endif
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/* #ifdef MT_GPUFREQ_AEE_RR_REC */
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extern void aee_rr_rec_gpu_dvfs_vgpu(u8 val);
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extern void aee_rr_rec_gpu_dvfs_oppidx(u8 val);
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extern void aee_rr_rec_gpu_dvfs_status(u8 val);
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extern u8 aee_rr_curr_gpu_dvfs_status(void);
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/* #endif */
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/*****************
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* power limit notification
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******************/
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typedef void (*gpufreq_power_limit_notify)(unsigned int);
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extern void mt_gpufreq_power_limit_notify_registerCB(gpufreq_power_limit_notify pCB);
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/*****************
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* input boost notification
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******************/
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typedef void (*gpufreq_input_boost_notify)(unsigned int);
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extern void mt_gpufreq_input_boost_notify_registerCB(gpufreq_input_boost_notify pCB);
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/*****************
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* update voltage notification
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******************/
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typedef void (*gpufreq_ptpod_update_notify)(void);
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extern void mt_gpufreq_update_volt_registerCB(gpufreq_ptpod_update_notify pCB);
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/*****************
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* profiling purpose
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******************/
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typedef void (*sampler_func)(unsigned int);
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extern void mt_gpufreq_setfreq_registerCB(sampler_func pCB);
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extern void mt_gpufreq_setvolt_registerCB(sampler_func pCB);
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extern void switch_mfg_clk(int src);
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#ifdef MTK_GPU_SPM
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void mtk_gpu_spm_fix_by_idx(unsigned int idx);
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void mtk_gpu_spm_reset_fix(void);
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void mtk_gpu_spm_pause(void);
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void mtk_gpu_spm_resume(void);
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#endif
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#endif
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