132 lines
3.4 KiB
C
Executable file
132 lines
3.4 KiB
C
Executable file
/*******************************************************************************
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*
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* Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenFabrics.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*******************************************************************************/
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#ifndef I40IW_PBLE_H
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#define I40IW_PBLE_H
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#define POOL_SHIFT 6
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#define PBLE_PER_PAGE 512
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#define I40IW_HMC_PAGED_BP_SHIFT 12
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#define PBLE_512_SHIFT 9
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enum i40iw_pble_level {
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I40IW_LEVEL_0 = 0,
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I40IW_LEVEL_1 = 1,
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I40IW_LEVEL_2 = 2
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};
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enum i40iw_alloc_type {
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I40IW_NO_ALLOC = 0,
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I40IW_DMA_COHERENT = 1,
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I40IW_VMALLOC = 2
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};
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struct i40iw_pble_info {
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unsigned long addr;
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u32 idx;
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u32 cnt;
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};
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struct i40iw_pble_level2 {
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struct i40iw_pble_info root;
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struct i40iw_pble_info *leaf;
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u32 leaf_cnt;
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};
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struct i40iw_pble_alloc {
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u32 total_cnt;
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enum i40iw_pble_level level;
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union {
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struct i40iw_pble_info level1;
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struct i40iw_pble_level2 level2;
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};
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};
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struct sd_pd_idx {
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u32 sd_idx;
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u32 pd_idx;
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u32 rel_pd_idx;
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};
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struct i40iw_add_page_info {
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struct i40iw_chunk *chunk;
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struct i40iw_hmc_sd_entry *sd_entry;
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struct i40iw_hmc_info *hmc_info;
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struct sd_pd_idx idx;
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u32 pages;
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};
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struct i40iw_chunk {
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struct list_head list;
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u32 size;
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void *vaddr;
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u64 fpm_addr;
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u32 pg_cnt;
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dma_addr_t *dmaaddrs;
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enum i40iw_alloc_type type;
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};
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struct i40iw_pble_pool {
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struct gen_pool *pool;
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struct list_head clist;
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u32 total_pble_alloc;
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u32 free_pble_cnt;
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u32 pool_shift;
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};
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struct i40iw_hmc_pble_rsrc {
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u32 unallocated_pble;
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u64 fpm_base_addr;
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u64 next_fpm_addr;
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struct i40iw_pble_pool pinfo;
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u32 stats_direct_sds;
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u32 stats_paged_sds;
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u64 stats_alloc_ok;
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u64 stats_alloc_fail;
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u64 stats_alloc_freed;
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u64 stats_lvl1;
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u64 stats_lvl2;
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};
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void i40iw_destroy_pble_pool(struct i40iw_sc_dev *dev, struct i40iw_hmc_pble_rsrc *pble_rsrc);
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enum i40iw_status_code i40iw_hmc_init_pble(struct i40iw_sc_dev *dev,
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struct i40iw_hmc_pble_rsrc *pble_rsrc);
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void i40iw_free_pble(struct i40iw_hmc_pble_rsrc *pble_rsrc, struct i40iw_pble_alloc *palloc);
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enum i40iw_status_code i40iw_get_pble(struct i40iw_sc_dev *dev,
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struct i40iw_hmc_pble_rsrc *pble_rsrc,
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struct i40iw_pble_alloc *palloc,
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u32 pble_cnt);
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#endif
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