c05564c4d8
Android 13
933 lines
26 KiB
C
Executable file
933 lines
26 KiB
C
Executable file
/*
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* Copyright (c) 2006, 2007 Cisco Systems. All rights reserved.
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* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MLX4_IB_H
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#define MLX4_IB_H
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#include <linux/compiler.h>
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#include <linux/list.h>
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#include <linux/mutex.h>
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#include <linux/idr.h>
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#include <rdma/ib_verbs.h>
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#include <rdma/ib_umem.h>
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#include <rdma/ib_mad.h>
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#include <rdma/ib_sa.h>
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#include <linux/mlx4/device.h>
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#include <linux/mlx4/doorbell.h>
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#include <linux/mlx4/qp.h>
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#include <linux/mlx4/cq.h>
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#define MLX4_IB_DRV_NAME "mlx4_ib"
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#ifdef pr_fmt
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#undef pr_fmt
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#endif
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#define pr_fmt(fmt) "<" MLX4_IB_DRV_NAME "> %s: " fmt, __func__
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#define mlx4_ib_warn(ibdev, format, arg...) \
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dev_warn((ibdev)->dev.parent, MLX4_IB_DRV_NAME ": " format, ## arg)
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enum {
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MLX4_IB_SQ_MIN_WQE_SHIFT = 6,
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MLX4_IB_MAX_HEADROOM = 2048
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};
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#define MLX4_IB_SQ_HEADROOM(shift) ((MLX4_IB_MAX_HEADROOM >> (shift)) + 1)
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#define MLX4_IB_SQ_MAX_SPARE (MLX4_IB_SQ_HEADROOM(MLX4_IB_SQ_MIN_WQE_SHIFT))
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/*module param to indicate if SM assigns the alias_GUID*/
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extern int mlx4_ib_sm_guid_assign;
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#define MLX4_IB_UC_STEER_QPN_ALIGN 1
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#define MLX4_IB_UC_MAX_NUM_QPS 256
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enum hw_bar_type {
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HW_BAR_BF,
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HW_BAR_DB,
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HW_BAR_CLOCK,
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HW_BAR_COUNT
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};
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struct mlx4_ib_vma_private_data {
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struct vm_area_struct *vma;
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};
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struct mlx4_ib_ucontext {
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struct ib_ucontext ibucontext;
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struct mlx4_uar uar;
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struct list_head db_page_list;
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struct mutex db_page_mutex;
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struct mlx4_ib_vma_private_data hw_bar_info[HW_BAR_COUNT];
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struct list_head wqn_ranges_list;
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struct mutex wqn_ranges_mutex; /* protect wqn_ranges_list */
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};
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struct mlx4_ib_pd {
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struct ib_pd ibpd;
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u32 pdn;
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};
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struct mlx4_ib_xrcd {
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struct ib_xrcd ibxrcd;
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u32 xrcdn;
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struct ib_pd *pd;
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struct ib_cq *cq;
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};
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struct mlx4_ib_cq_buf {
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struct mlx4_buf buf;
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struct mlx4_mtt mtt;
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int entry_size;
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};
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struct mlx4_ib_cq_resize {
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struct mlx4_ib_cq_buf buf;
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int cqe;
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};
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struct mlx4_ib_cq {
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struct ib_cq ibcq;
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struct mlx4_cq mcq;
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struct mlx4_ib_cq_buf buf;
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struct mlx4_ib_cq_resize *resize_buf;
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struct mlx4_db db;
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spinlock_t lock;
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struct mutex resize_mutex;
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struct ib_umem *umem;
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struct ib_umem *resize_umem;
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int create_flags;
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/* List of qps that it serves.*/
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struct list_head send_qp_list;
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struct list_head recv_qp_list;
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};
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#define MLX4_MR_PAGES_ALIGN 0x40
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struct mlx4_ib_mr {
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struct ib_mr ibmr;
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__be64 *pages;
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dma_addr_t page_map;
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u32 npages;
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u32 max_pages;
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struct mlx4_mr mmr;
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struct ib_umem *umem;
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size_t page_map_size;
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};
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struct mlx4_ib_mw {
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struct ib_mw ibmw;
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struct mlx4_mw mmw;
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};
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struct mlx4_ib_fmr {
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struct ib_fmr ibfmr;
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struct mlx4_fmr mfmr;
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};
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#define MAX_REGS_PER_FLOW 2
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struct mlx4_flow_reg_id {
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u64 id;
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u64 mirror;
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};
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struct mlx4_ib_flow {
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struct ib_flow ibflow;
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/* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
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struct mlx4_flow_reg_id reg_id[MAX_REGS_PER_FLOW];
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};
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struct mlx4_ib_wq {
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u64 *wrid;
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spinlock_t lock;
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int wqe_cnt;
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int max_post;
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int max_gs;
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int offset;
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int wqe_shift;
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unsigned head;
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unsigned tail;
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};
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enum {
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MLX4_IB_QP_CREATE_ROCE_V2_GSI = IB_QP_CREATE_RESERVED_START
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};
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enum mlx4_ib_qp_flags {
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MLX4_IB_QP_LSO = IB_QP_CREATE_IPOIB_UD_LSO,
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MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK = IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK,
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MLX4_IB_QP_NETIF = IB_QP_CREATE_NETIF_QP,
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MLX4_IB_QP_SCATTER_FCS = IB_QP_CREATE_SCATTER_FCS,
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/* Mellanox specific flags start from IB_QP_CREATE_RESERVED_START */
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MLX4_IB_ROCE_V2_GSI_QP = MLX4_IB_QP_CREATE_ROCE_V2_GSI,
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MLX4_IB_SRIOV_TUNNEL_QP = 1 << 30,
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MLX4_IB_SRIOV_SQP = 1 << 31,
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};
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struct mlx4_ib_gid_entry {
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struct list_head list;
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union ib_gid gid;
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int added;
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u8 port;
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};
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enum mlx4_ib_qp_type {
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/*
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* IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
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* here (and in that order) since the MAD layer uses them as
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* indices into a 2-entry table.
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*/
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MLX4_IB_QPT_SMI = IB_QPT_SMI,
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MLX4_IB_QPT_GSI = IB_QPT_GSI,
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MLX4_IB_QPT_RC = IB_QPT_RC,
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MLX4_IB_QPT_UC = IB_QPT_UC,
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MLX4_IB_QPT_UD = IB_QPT_UD,
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MLX4_IB_QPT_RAW_IPV6 = IB_QPT_RAW_IPV6,
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MLX4_IB_QPT_RAW_ETHERTYPE = IB_QPT_RAW_ETHERTYPE,
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MLX4_IB_QPT_RAW_PACKET = IB_QPT_RAW_PACKET,
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MLX4_IB_QPT_XRC_INI = IB_QPT_XRC_INI,
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MLX4_IB_QPT_XRC_TGT = IB_QPT_XRC_TGT,
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MLX4_IB_QPT_PROXY_SMI_OWNER = 1 << 16,
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MLX4_IB_QPT_PROXY_SMI = 1 << 17,
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MLX4_IB_QPT_PROXY_GSI = 1 << 18,
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MLX4_IB_QPT_TUN_SMI_OWNER = 1 << 19,
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MLX4_IB_QPT_TUN_SMI = 1 << 20,
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MLX4_IB_QPT_TUN_GSI = 1 << 21,
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};
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#define MLX4_IB_QPT_ANY_SRIOV (MLX4_IB_QPT_PROXY_SMI_OWNER | \
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MLX4_IB_QPT_PROXY_SMI | MLX4_IB_QPT_PROXY_GSI | MLX4_IB_QPT_TUN_SMI_OWNER | \
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MLX4_IB_QPT_TUN_SMI | MLX4_IB_QPT_TUN_GSI)
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enum mlx4_ib_mad_ifc_flags {
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MLX4_MAD_IFC_IGNORE_MKEY = 1,
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MLX4_MAD_IFC_IGNORE_BKEY = 2,
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MLX4_MAD_IFC_IGNORE_KEYS = (MLX4_MAD_IFC_IGNORE_MKEY |
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MLX4_MAD_IFC_IGNORE_BKEY),
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MLX4_MAD_IFC_NET_VIEW = 4,
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};
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enum {
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MLX4_NUM_TUNNEL_BUFS = 256,
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};
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struct mlx4_ib_tunnel_header {
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struct mlx4_av av;
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__be32 remote_qpn;
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__be32 qkey;
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__be16 vlan;
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u8 mac[6];
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__be16 pkey_index;
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u8 reserved[6];
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};
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struct mlx4_ib_buf {
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void *addr;
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dma_addr_t map;
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};
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struct mlx4_rcv_tunnel_hdr {
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__be32 flags_src_qp; /* flags[6:5] is defined for VLANs:
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* 0x0 - no vlan was in the packet
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* 0x01 - C-VLAN was in the packet */
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u8 g_ml_path; /* gid bit stands for ipv6/4 header in RoCE */
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u8 reserved;
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__be16 pkey_index;
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__be16 sl_vid;
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__be16 slid_mac_47_32;
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__be32 mac_31_0;
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};
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struct mlx4_ib_proxy_sqp_hdr {
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struct ib_grh grh;
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struct mlx4_rcv_tunnel_hdr tun;
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} __packed;
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struct mlx4_roce_smac_vlan_info {
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u64 smac;
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int smac_index;
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int smac_port;
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u64 candidate_smac;
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int candidate_smac_index;
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int candidate_smac_port;
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u16 vid;
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int vlan_index;
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int vlan_port;
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u16 candidate_vid;
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int candidate_vlan_index;
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int candidate_vlan_port;
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int update_vid;
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};
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struct mlx4_wqn_range {
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int base_wqn;
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int size;
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int refcount;
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bool dirty;
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struct list_head list;
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};
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struct mlx4_ib_rss {
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unsigned int base_qpn_tbl_sz;
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u8 flags;
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u8 rss_key[MLX4_EN_RSS_KEY_SIZE];
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};
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struct mlx4_ib_qp {
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union {
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struct ib_qp ibqp;
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struct ib_wq ibwq;
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};
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struct mlx4_qp mqp;
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struct mlx4_buf buf;
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struct mlx4_db db;
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struct mlx4_ib_wq rq;
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u32 doorbell_qpn;
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__be32 sq_signal_bits;
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unsigned sq_next_wqe;
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int sq_spare_wqes;
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struct mlx4_ib_wq sq;
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enum mlx4_ib_qp_type mlx4_ib_qp_type;
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struct ib_umem *umem;
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struct mlx4_mtt mtt;
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int buf_size;
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struct mutex mutex;
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u16 xrcdn;
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u32 flags;
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u8 port;
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u8 alt_port;
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u8 atomic_rd_en;
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u8 resp_depth;
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u8 sq_no_prefetch;
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u8 state;
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int mlx_type;
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u32 inl_recv_sz;
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struct list_head gid_list;
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struct list_head steering_rules;
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struct mlx4_ib_buf *sqp_proxy_rcv;
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struct mlx4_roce_smac_vlan_info pri;
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struct mlx4_roce_smac_vlan_info alt;
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u64 reg_id;
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struct list_head qps_list;
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struct list_head cq_recv_list;
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struct list_head cq_send_list;
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struct counter_index *counter_index;
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struct mlx4_wqn_range *wqn_range;
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/* Number of RSS QP parents that uses this WQ */
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u32 rss_usecnt;
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struct mlx4_ib_rss *rss_ctx;
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};
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struct mlx4_ib_srq {
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struct ib_srq ibsrq;
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struct mlx4_srq msrq;
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struct mlx4_buf buf;
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struct mlx4_db db;
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u64 *wrid;
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spinlock_t lock;
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int head;
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int tail;
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u16 wqe_ctr;
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struct ib_umem *umem;
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struct mlx4_mtt mtt;
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struct mutex mutex;
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};
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struct mlx4_ib_ah {
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struct ib_ah ibah;
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union mlx4_ext_av av;
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};
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/****************************************/
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/* alias guid support */
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/****************************************/
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#define NUM_PORT_ALIAS_GUID 2
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#define NUM_ALIAS_GUID_IN_REC 8
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#define NUM_ALIAS_GUID_REC_IN_PORT 16
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#define GUID_REC_SIZE 8
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#define NUM_ALIAS_GUID_PER_PORT 128
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#define MLX4_NOT_SET_GUID (0x00LL)
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#define MLX4_GUID_FOR_DELETE_VAL (~(0x00LL))
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enum mlx4_guid_alias_rec_status {
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MLX4_GUID_INFO_STATUS_IDLE,
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MLX4_GUID_INFO_STATUS_SET,
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};
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#define GUID_STATE_NEED_PORT_INIT 0x01
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enum mlx4_guid_alias_rec_method {
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MLX4_GUID_INFO_RECORD_SET = IB_MGMT_METHOD_SET,
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MLX4_GUID_INFO_RECORD_DELETE = IB_SA_METHOD_DELETE,
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};
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struct mlx4_sriov_alias_guid_info_rec_det {
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u8 all_recs[GUID_REC_SIZE * NUM_ALIAS_GUID_IN_REC];
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ib_sa_comp_mask guid_indexes; /*indicates what from the 8 records are valid*/
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enum mlx4_guid_alias_rec_status status; /*indicates the administraively status of the record.*/
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unsigned int guids_retry_schedule[NUM_ALIAS_GUID_IN_REC];
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u64 time_to_run;
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};
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struct mlx4_sriov_alias_guid_port_rec_det {
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struct mlx4_sriov_alias_guid_info_rec_det all_rec_per_port[NUM_ALIAS_GUID_REC_IN_PORT];
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struct workqueue_struct *wq;
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struct delayed_work alias_guid_work;
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u8 port;
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u32 state_flags;
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struct mlx4_sriov_alias_guid *parent;
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struct list_head cb_list;
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};
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struct mlx4_sriov_alias_guid {
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struct mlx4_sriov_alias_guid_port_rec_det ports_guid[MLX4_MAX_PORTS];
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spinlock_t ag_work_lock;
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struct ib_sa_client *sa_client;
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};
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struct mlx4_ib_demux_work {
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struct work_struct work;
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struct mlx4_ib_dev *dev;
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int slave;
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int do_init;
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u8 port;
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};
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struct mlx4_ib_tun_tx_buf {
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struct mlx4_ib_buf buf;
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struct ib_ah *ah;
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};
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struct mlx4_ib_demux_pv_qp {
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struct ib_qp *qp;
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enum ib_qp_type proxy_qpt;
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struct mlx4_ib_buf *ring;
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struct mlx4_ib_tun_tx_buf *tx_ring;
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spinlock_t tx_lock;
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unsigned tx_ix_head;
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unsigned tx_ix_tail;
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};
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enum mlx4_ib_demux_pv_state {
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DEMUX_PV_STATE_DOWN,
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DEMUX_PV_STATE_STARTING,
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DEMUX_PV_STATE_ACTIVE,
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DEMUX_PV_STATE_DOWNING,
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};
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struct mlx4_ib_demux_pv_ctx {
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int port;
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int slave;
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enum mlx4_ib_demux_pv_state state;
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int has_smi;
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struct ib_device *ib_dev;
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struct ib_cq *cq;
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struct ib_pd *pd;
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struct work_struct work;
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struct workqueue_struct *wq;
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struct workqueue_struct *wi_wq;
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struct mlx4_ib_demux_pv_qp qp[2];
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};
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struct mlx4_ib_demux_ctx {
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struct ib_device *ib_dev;
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int port;
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struct workqueue_struct *wq;
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struct workqueue_struct *wi_wq;
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struct workqueue_struct *ud_wq;
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spinlock_t ud_lock;
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atomic64_t subnet_prefix;
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__be64 guid_cache[128];
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struct mlx4_ib_dev *dev;
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/* the following lock protects both mcg_table and mcg_mgid0_list */
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struct mutex mcg_table_lock;
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struct rb_root mcg_table;
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struct list_head mcg_mgid0_list;
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struct workqueue_struct *mcg_wq;
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struct mlx4_ib_demux_pv_ctx **tun;
|
|
atomic_t tid;
|
|
int flushing; /* flushing the work queue */
|
|
};
|
|
|
|
struct mlx4_ib_sriov {
|
|
struct mlx4_ib_demux_ctx demux[MLX4_MAX_PORTS];
|
|
struct mlx4_ib_demux_pv_ctx *sqps[MLX4_MAX_PORTS];
|
|
/* when using this spinlock you should use "irq" because
|
|
* it may be called from interrupt context.*/
|
|
spinlock_t going_down_lock;
|
|
int is_going_down;
|
|
|
|
struct mlx4_sriov_alias_guid alias_guid;
|
|
|
|
/* CM paravirtualization fields */
|
|
struct list_head cm_list;
|
|
spinlock_t id_map_lock;
|
|
struct rb_root sl_id_map;
|
|
struct idr pv_id_table;
|
|
};
|
|
|
|
struct gid_cache_context {
|
|
int real_index;
|
|
int refcount;
|
|
};
|
|
|
|
struct gid_entry {
|
|
union ib_gid gid;
|
|
enum ib_gid_type gid_type;
|
|
struct gid_cache_context *ctx;
|
|
};
|
|
|
|
struct mlx4_port_gid_table {
|
|
struct gid_entry gids[MLX4_MAX_PORT_GIDS];
|
|
};
|
|
|
|
struct mlx4_ib_iboe {
|
|
spinlock_t lock;
|
|
struct net_device *netdevs[MLX4_MAX_PORTS];
|
|
atomic64_t mac[MLX4_MAX_PORTS];
|
|
struct notifier_block nb;
|
|
struct mlx4_port_gid_table gids[MLX4_MAX_PORTS];
|
|
};
|
|
|
|
struct pkey_mgt {
|
|
u8 virt2phys_pkey[MLX4_MFUNC_MAX][MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
|
|
u16 phys_pkey_cache[MLX4_MAX_PORTS][MLX4_MAX_PORT_PKEYS];
|
|
struct list_head pkey_port_list[MLX4_MFUNC_MAX];
|
|
struct kobject *device_parent[MLX4_MFUNC_MAX];
|
|
};
|
|
|
|
struct mlx4_ib_iov_sysfs_attr {
|
|
void *ctx;
|
|
struct kobject *kobj;
|
|
unsigned long data;
|
|
u32 entry_num;
|
|
char name[15];
|
|
struct device_attribute dentry;
|
|
struct device *dev;
|
|
};
|
|
|
|
struct mlx4_ib_iov_sysfs_attr_ar {
|
|
struct mlx4_ib_iov_sysfs_attr dentries[3 * NUM_ALIAS_GUID_PER_PORT + 1];
|
|
};
|
|
|
|
struct mlx4_ib_iov_port {
|
|
char name[100];
|
|
u8 num;
|
|
struct mlx4_ib_dev *dev;
|
|
struct list_head list;
|
|
struct mlx4_ib_iov_sysfs_attr_ar *dentr_ar;
|
|
struct ib_port_attr attr;
|
|
struct kobject *cur_port;
|
|
struct kobject *admin_alias_parent;
|
|
struct kobject *gids_parent;
|
|
struct kobject *pkeys_parent;
|
|
struct kobject *mcgs_parent;
|
|
struct mlx4_ib_iov_sysfs_attr mcg_dentry;
|
|
};
|
|
|
|
struct counter_index {
|
|
struct list_head list;
|
|
u32 index;
|
|
u8 allocated;
|
|
};
|
|
|
|
struct mlx4_ib_counters {
|
|
struct list_head counters_list;
|
|
struct mutex mutex; /* mutex for accessing counters list */
|
|
u32 default_counter;
|
|
};
|
|
|
|
#define MLX4_DIAG_COUNTERS_TYPES 2
|
|
|
|
struct mlx4_ib_diag_counters {
|
|
const char **name;
|
|
u32 *offset;
|
|
u32 num_counters;
|
|
};
|
|
|
|
struct mlx4_ib_dev {
|
|
struct ib_device ib_dev;
|
|
struct mlx4_dev *dev;
|
|
int num_ports;
|
|
void __iomem *uar_map;
|
|
|
|
struct mlx4_uar priv_uar;
|
|
u32 priv_pdn;
|
|
MLX4_DECLARE_DOORBELL_LOCK(uar_lock);
|
|
|
|
struct ib_mad_agent *send_agent[MLX4_MAX_PORTS][2];
|
|
struct ib_ah *sm_ah[MLX4_MAX_PORTS];
|
|
spinlock_t sm_lock;
|
|
atomic64_t sl2vl[MLX4_MAX_PORTS];
|
|
struct mlx4_ib_sriov sriov;
|
|
|
|
struct mutex cap_mask_mutex;
|
|
bool ib_active;
|
|
struct mlx4_ib_iboe iboe;
|
|
struct mlx4_ib_counters counters_table[MLX4_MAX_PORTS];
|
|
int *eq_table;
|
|
struct kobject *iov_parent;
|
|
struct kobject *ports_parent;
|
|
struct kobject *dev_ports_parent[MLX4_MFUNC_MAX];
|
|
struct mlx4_ib_iov_port iov_ports[MLX4_MAX_PORTS];
|
|
struct pkey_mgt pkeys;
|
|
unsigned long *ib_uc_qpns_bitmap;
|
|
int steer_qpn_count;
|
|
int steer_qpn_base;
|
|
int steering_support;
|
|
struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS];
|
|
/* lock when destroying qp1_proxy and getting netdev events */
|
|
struct mutex qp1_proxy_lock[MLX4_MAX_PORTS];
|
|
u8 bond_next_port;
|
|
/* protect resources needed as part of reset flow */
|
|
spinlock_t reset_flow_resource_lock;
|
|
struct list_head qp_list;
|
|
struct mlx4_ib_diag_counters diag_counters[MLX4_DIAG_COUNTERS_TYPES];
|
|
};
|
|
|
|
struct ib_event_work {
|
|
struct work_struct work;
|
|
struct mlx4_ib_dev *ib_dev;
|
|
struct mlx4_eqe ib_eqe;
|
|
int port;
|
|
};
|
|
|
|
struct mlx4_ib_qp_tunnel_init_attr {
|
|
struct ib_qp_init_attr init_attr;
|
|
int slave;
|
|
enum ib_qp_type proxy_qp_type;
|
|
u8 port;
|
|
};
|
|
|
|
struct mlx4_uverbs_ex_query_device {
|
|
__u32 comp_mask;
|
|
__u32 reserved;
|
|
};
|
|
|
|
static inline struct mlx4_ib_dev *to_mdev(struct ib_device *ibdev)
|
|
{
|
|
return container_of(ibdev, struct mlx4_ib_dev, ib_dev);
|
|
}
|
|
|
|
static inline struct mlx4_ib_ucontext *to_mucontext(struct ib_ucontext *ibucontext)
|
|
{
|
|
return container_of(ibucontext, struct mlx4_ib_ucontext, ibucontext);
|
|
}
|
|
|
|
static inline struct mlx4_ib_pd *to_mpd(struct ib_pd *ibpd)
|
|
{
|
|
return container_of(ibpd, struct mlx4_ib_pd, ibpd);
|
|
}
|
|
|
|
static inline struct mlx4_ib_xrcd *to_mxrcd(struct ib_xrcd *ibxrcd)
|
|
{
|
|
return container_of(ibxrcd, struct mlx4_ib_xrcd, ibxrcd);
|
|
}
|
|
|
|
static inline struct mlx4_ib_cq *to_mcq(struct ib_cq *ibcq)
|
|
{
|
|
return container_of(ibcq, struct mlx4_ib_cq, ibcq);
|
|
}
|
|
|
|
static inline struct mlx4_ib_cq *to_mibcq(struct mlx4_cq *mcq)
|
|
{
|
|
return container_of(mcq, struct mlx4_ib_cq, mcq);
|
|
}
|
|
|
|
static inline struct mlx4_ib_mr *to_mmr(struct ib_mr *ibmr)
|
|
{
|
|
return container_of(ibmr, struct mlx4_ib_mr, ibmr);
|
|
}
|
|
|
|
static inline struct mlx4_ib_mw *to_mmw(struct ib_mw *ibmw)
|
|
{
|
|
return container_of(ibmw, struct mlx4_ib_mw, ibmw);
|
|
}
|
|
|
|
static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
|
|
{
|
|
return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
|
|
}
|
|
|
|
static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
|
|
{
|
|
return container_of(ibflow, struct mlx4_ib_flow, ibflow);
|
|
}
|
|
|
|
static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
|
|
{
|
|
return container_of(ibqp, struct mlx4_ib_qp, ibqp);
|
|
}
|
|
|
|
static inline struct mlx4_ib_qp *to_mibqp(struct mlx4_qp *mqp)
|
|
{
|
|
return container_of(mqp, struct mlx4_ib_qp, mqp);
|
|
}
|
|
|
|
static inline struct mlx4_ib_srq *to_msrq(struct ib_srq *ibsrq)
|
|
{
|
|
return container_of(ibsrq, struct mlx4_ib_srq, ibsrq);
|
|
}
|
|
|
|
static inline struct mlx4_ib_srq *to_mibsrq(struct mlx4_srq *msrq)
|
|
{
|
|
return container_of(msrq, struct mlx4_ib_srq, msrq);
|
|
}
|
|
|
|
static inline struct mlx4_ib_ah *to_mah(struct ib_ah *ibah)
|
|
{
|
|
return container_of(ibah, struct mlx4_ib_ah, ibah);
|
|
}
|
|
|
|
static inline u8 mlx4_ib_bond_next_port(struct mlx4_ib_dev *dev)
|
|
{
|
|
dev->bond_next_port = (dev->bond_next_port + 1) % dev->num_ports;
|
|
|
|
return dev->bond_next_port + 1;
|
|
}
|
|
|
|
int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev);
|
|
void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev);
|
|
|
|
int mlx4_ib_db_map_user(struct mlx4_ib_ucontext *context, unsigned long virt,
|
|
struct mlx4_db *db);
|
|
void mlx4_ib_db_unmap_user(struct mlx4_ib_ucontext *context, struct mlx4_db *db);
|
|
|
|
struct ib_mr *mlx4_ib_get_dma_mr(struct ib_pd *pd, int acc);
|
|
int mlx4_ib_umem_write_mtt(struct mlx4_ib_dev *dev, struct mlx4_mtt *mtt,
|
|
struct ib_umem *umem);
|
|
struct ib_mr *mlx4_ib_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
|
|
u64 virt_addr, int access_flags,
|
|
struct ib_udata *udata);
|
|
int mlx4_ib_dereg_mr(struct ib_mr *mr);
|
|
struct ib_mw *mlx4_ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
|
|
struct ib_udata *udata);
|
|
int mlx4_ib_dealloc_mw(struct ib_mw *mw);
|
|
struct ib_mr *mlx4_ib_alloc_mr(struct ib_pd *pd,
|
|
enum ib_mr_type mr_type,
|
|
u32 max_num_sg);
|
|
int mlx4_ib_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg, int sg_nents,
|
|
unsigned int *sg_offset);
|
|
int mlx4_ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
|
|
int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata);
|
|
struct ib_cq *mlx4_ib_create_cq(struct ib_device *ibdev,
|
|
const struct ib_cq_init_attr *attr,
|
|
struct ib_ucontext *context,
|
|
struct ib_udata *udata);
|
|
int mlx4_ib_destroy_cq(struct ib_cq *cq);
|
|
int mlx4_ib_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
|
|
int mlx4_ib_arm_cq(struct ib_cq *cq, enum ib_cq_notify_flags flags);
|
|
void __mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
|
|
void mlx4_ib_cq_clean(struct mlx4_ib_cq *cq, u32 qpn, struct mlx4_ib_srq *srq);
|
|
|
|
struct ib_ah *mlx4_ib_create_ah(struct ib_pd *pd, struct rdma_ah_attr *ah_attr,
|
|
struct ib_udata *udata);
|
|
struct ib_ah *mlx4_ib_create_ah_slave(struct ib_pd *pd,
|
|
struct rdma_ah_attr *ah_attr,
|
|
int slave_sgid_index, u8 *s_mac,
|
|
u16 vlan_tag);
|
|
int mlx4_ib_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr);
|
|
int mlx4_ib_destroy_ah(struct ib_ah *ah);
|
|
|
|
struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
|
|
struct ib_srq_init_attr *init_attr,
|
|
struct ib_udata *udata);
|
|
int mlx4_ib_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
|
|
enum ib_srq_attr_mask attr_mask, struct ib_udata *udata);
|
|
int mlx4_ib_query_srq(struct ib_srq *srq, struct ib_srq_attr *srq_attr);
|
|
int mlx4_ib_destroy_srq(struct ib_srq *srq);
|
|
void mlx4_ib_free_srq_wqe(struct mlx4_ib_srq *srq, int wqe_index);
|
|
int mlx4_ib_post_srq_recv(struct ib_srq *ibsrq, const struct ib_recv_wr *wr,
|
|
const struct ib_recv_wr **bad_wr);
|
|
|
|
struct ib_qp *mlx4_ib_create_qp(struct ib_pd *pd,
|
|
struct ib_qp_init_attr *init_attr,
|
|
struct ib_udata *udata);
|
|
int mlx4_ib_destroy_qp(struct ib_qp *qp);
|
|
void mlx4_ib_drain_sq(struct ib_qp *qp);
|
|
void mlx4_ib_drain_rq(struct ib_qp *qp);
|
|
int mlx4_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
|
|
int attr_mask, struct ib_udata *udata);
|
|
int mlx4_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *qp_attr, int qp_attr_mask,
|
|
struct ib_qp_init_attr *qp_init_attr);
|
|
int mlx4_ib_post_send(struct ib_qp *ibqp, const struct ib_send_wr *wr,
|
|
const struct ib_send_wr **bad_wr);
|
|
int mlx4_ib_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
|
|
const struct ib_recv_wr **bad_wr);
|
|
|
|
int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
|
|
int port, const struct ib_wc *in_wc, const struct ib_grh *in_grh,
|
|
const void *in_mad, void *response_mad);
|
|
int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
|
|
const struct ib_wc *in_wc, const struct ib_grh *in_grh,
|
|
const struct ib_mad_hdr *in, size_t in_mad_size,
|
|
struct ib_mad_hdr *out, size_t *out_mad_size,
|
|
u16 *out_mad_pkey_index);
|
|
int mlx4_ib_mad_init(struct mlx4_ib_dev *dev);
|
|
void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev);
|
|
|
|
struct ib_fmr *mlx4_ib_fmr_alloc(struct ib_pd *pd, int mr_access_flags,
|
|
struct ib_fmr_attr *fmr_attr);
|
|
int mlx4_ib_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, int npages,
|
|
u64 iova);
|
|
int mlx4_ib_unmap_fmr(struct list_head *fmr_list);
|
|
int mlx4_ib_fmr_dealloc(struct ib_fmr *fmr);
|
|
int __mlx4_ib_query_port(struct ib_device *ibdev, u8 port,
|
|
struct ib_port_attr *props, int netw_view);
|
|
int __mlx4_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
|
|
u16 *pkey, int netw_view);
|
|
|
|
int __mlx4_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
|
|
union ib_gid *gid, int netw_view);
|
|
|
|
static inline bool mlx4_ib_ah_grh_present(struct mlx4_ib_ah *ah)
|
|
{
|
|
u8 port = be32_to_cpu(ah->av.ib.port_pd) >> 24 & 3;
|
|
|
|
if (rdma_port_get_link_layer(ah->ibah.device, port) == IB_LINK_LAYER_ETHERNET)
|
|
return true;
|
|
|
|
return !!(ah->av.ib.g_slid & 0x80);
|
|
}
|
|
|
|
int mlx4_ib_mcg_port_init(struct mlx4_ib_demux_ctx *ctx);
|
|
void mlx4_ib_mcg_port_cleanup(struct mlx4_ib_demux_ctx *ctx, int destroy_wq);
|
|
void clean_vf_mcast(struct mlx4_ib_demux_ctx *ctx, int slave);
|
|
int mlx4_ib_mcg_init(void);
|
|
void mlx4_ib_mcg_destroy(void);
|
|
|
|
int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid);
|
|
|
|
int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, int slave,
|
|
struct ib_sa_mad *sa_mad);
|
|
int mlx4_ib_mcg_demux_handler(struct ib_device *ibdev, int port, int slave,
|
|
struct ib_sa_mad *mad);
|
|
|
|
int mlx4_ib_add_mc(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
|
|
union ib_gid *gid);
|
|
|
|
void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
|
|
enum ib_event_type type);
|
|
|
|
void mlx4_ib_tunnels_update_work(struct work_struct *work);
|
|
|
|
int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
|
|
enum ib_qp_type qpt, struct ib_wc *wc,
|
|
struct ib_grh *grh, struct ib_mad *mad);
|
|
|
|
int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
|
|
enum ib_qp_type dest_qpt, u16 pkey_index, u32 remote_qpn,
|
|
u32 qkey, struct rdma_ah_attr *attr, u8 *s_mac,
|
|
u16 vlan_id, struct ib_mad *mad);
|
|
|
|
__be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx);
|
|
|
|
int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
|
|
struct ib_mad *mad);
|
|
|
|
int mlx4_ib_multiplex_cm_handler(struct ib_device *ibdev, int port, int slave_id,
|
|
struct ib_mad *mad);
|
|
|
|
void mlx4_ib_cm_paravirt_init(struct mlx4_ib_dev *dev);
|
|
void mlx4_ib_cm_paravirt_clean(struct mlx4_ib_dev *dev, int slave_id);
|
|
|
|
/* alias guid support */
|
|
void mlx4_ib_init_alias_guid_work(struct mlx4_ib_dev *dev, int port);
|
|
int mlx4_ib_init_alias_guid_service(struct mlx4_ib_dev *dev);
|
|
void mlx4_ib_destroy_alias_guid_service(struct mlx4_ib_dev *dev);
|
|
void mlx4_ib_invalidate_all_guid_record(struct mlx4_ib_dev *dev, int port);
|
|
|
|
void mlx4_ib_notify_slaves_on_guid_change(struct mlx4_ib_dev *dev,
|
|
int block_num,
|
|
u8 port_num, u8 *p_data);
|
|
|
|
void mlx4_ib_update_cache_on_guid_change(struct mlx4_ib_dev *dev,
|
|
int block_num, u8 port_num,
|
|
u8 *p_data);
|
|
|
|
int add_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
|
|
struct attribute *attr);
|
|
void del_sysfs_port_mcg_attr(struct mlx4_ib_dev *device, int port_num,
|
|
struct attribute *attr);
|
|
ib_sa_comp_mask mlx4_ib_get_aguid_comp_mask_from_ix(int index);
|
|
void mlx4_ib_slave_alias_guid_event(struct mlx4_ib_dev *dev, int slave,
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int port, int slave_init);
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int mlx4_ib_device_register_sysfs(struct mlx4_ib_dev *device) ;
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void mlx4_ib_device_unregister_sysfs(struct mlx4_ib_dev *device);
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__be64 mlx4_ib_gen_node_guid(void);
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int mlx4_ib_steer_qp_alloc(struct mlx4_ib_dev *dev, int count, int *qpn);
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void mlx4_ib_steer_qp_free(struct mlx4_ib_dev *dev, u32 qpn, int count);
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int mlx4_ib_steer_qp_reg(struct mlx4_ib_dev *mdev, struct mlx4_ib_qp *mqp,
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int is_attach);
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int mlx4_ib_rereg_user_mr(struct ib_mr *mr, int flags,
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u64 start, u64 length, u64 virt_addr,
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int mr_access_flags, struct ib_pd *pd,
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struct ib_udata *udata);
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int mlx4_ib_gid_index_to_real_index(struct mlx4_ib_dev *ibdev,
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const struct ib_gid_attr *attr);
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void mlx4_sched_ib_sl2vl_update_work(struct mlx4_ib_dev *ibdev,
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int port);
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void mlx4_ib_sl2vl_update(struct mlx4_ib_dev *mdev, int port);
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struct ib_wq *mlx4_ib_create_wq(struct ib_pd *pd,
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struct ib_wq_init_attr *init_attr,
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struct ib_udata *udata);
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int mlx4_ib_destroy_wq(struct ib_wq *wq);
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int mlx4_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
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u32 wq_attr_mask, struct ib_udata *udata);
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struct ib_rwq_ind_table
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*mlx4_ib_create_rwq_ind_table(struct ib_device *device,
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struct ib_rwq_ind_table_init_attr *init_attr,
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struct ib_udata *udata);
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int mlx4_ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *wq_ind_table);
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int mlx4_ib_umem_calc_optimal_mtt_size(struct ib_umem *umem, u64 start_va,
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int *num_of_mtts);
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#endif /* MLX4_IB_H */
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