283 lines
7.4 KiB
C
Executable file
283 lines
7.4 KiB
C
Executable file
/*
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* Copyright (c) 2004 Topspin Communications. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include "mthca_dev.h"
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#include "mthca_cmd.h"
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int mthca_reset(struct mthca_dev *mdev)
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{
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int i;
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int err = 0;
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u32 *hca_header = NULL;
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u32 *bridge_header = NULL;
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struct pci_dev *bridge = NULL;
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int bridge_pcix_cap = 0;
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int hca_pcie_cap = 0;
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int hca_pcix_cap = 0;
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u16 devctl;
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u16 linkctl;
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#define MTHCA_RESET_OFFSET 0xf0010
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#define MTHCA_RESET_VALUE swab32(1)
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/*
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* Reset the chip. This is somewhat ugly because we have to
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* save off the PCI header before reset and then restore it
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* after the chip reboots. We skip config space offsets 22
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* and 23 since those have a special meaning.
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*
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* To make matters worse, for Tavor (PCI-X HCA) we have to
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* find the associated bridge device and save off its PCI
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* header as well.
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*/
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if (!(mdev->mthca_flags & MTHCA_FLAG_PCIE)) {
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/* Look for the bridge -- its device ID will be 2 more
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than HCA's device ID. */
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while ((bridge = pci_get_device(mdev->pdev->vendor,
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mdev->pdev->device + 2,
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bridge)) != NULL) {
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if (bridge->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
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bridge->subordinate == mdev->pdev->bus) {
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mthca_dbg(mdev, "Found bridge: %s\n",
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pci_name(bridge));
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break;
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}
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}
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if (!bridge) {
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/*
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* Didn't find a bridge for a Tavor device --
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* assume we're in no-bridge mode and hope for
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* the best.
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*/
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mthca_warn(mdev, "No bridge found for %s\n",
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pci_name(mdev->pdev));
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}
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}
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/* For Arbel do we need to save off the full 4K PCI Express header?? */
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hca_header = kmalloc(256, GFP_KERNEL);
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if (!hca_header) {
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err = -ENOMEM;
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goto put_dev;
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}
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for (i = 0; i < 64; ++i) {
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if (i == 22 || i == 23)
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continue;
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if (pci_read_config_dword(mdev->pdev, i * 4, hca_header + i)) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't save HCA "
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"PCI header, aborting.\n");
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goto free_hca;
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}
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}
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hca_pcix_cap = pci_find_capability(mdev->pdev, PCI_CAP_ID_PCIX);
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hca_pcie_cap = pci_pcie_cap(mdev->pdev);
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if (bridge) {
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bridge_header = kmalloc(256, GFP_KERNEL);
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if (!bridge_header) {
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err = -ENOMEM;
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goto free_hca;
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}
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for (i = 0; i < 64; ++i) {
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if (i == 22 || i == 23)
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continue;
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if (pci_read_config_dword(bridge, i * 4, bridge_header + i)) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't save HCA bridge "
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"PCI header, aborting.\n");
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goto free_bh;
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}
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}
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bridge_pcix_cap = pci_find_capability(bridge, PCI_CAP_ID_PCIX);
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if (!bridge_pcix_cap) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't locate HCA bridge "
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"PCI-X capability, aborting.\n");
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goto free_bh;
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}
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}
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/* actually hit reset */
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{
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void __iomem *reset = ioremap(pci_resource_start(mdev->pdev, 0) +
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MTHCA_RESET_OFFSET, 4);
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if (!reset) {
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err = -ENOMEM;
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mthca_err(mdev, "Couldn't map HCA reset register, "
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"aborting.\n");
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goto free_bh;
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}
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writel(MTHCA_RESET_VALUE, reset);
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iounmap(reset);
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}
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/* Docs say to wait one second before accessing device */
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msleep(1000);
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/* Now wait for PCI device to start responding again */
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{
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u32 v;
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int c = 0;
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for (c = 0; c < 100; ++c) {
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if (pci_read_config_dword(bridge ? bridge : mdev->pdev, 0, &v)) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't access HCA after reset, "
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"aborting.\n");
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goto free_bh;
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}
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if (v != 0xffffffff)
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goto good;
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msleep(100);
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}
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err = -ENODEV;
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mthca_err(mdev, "PCI device did not come back after reset, "
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"aborting.\n");
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goto free_bh;
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}
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good:
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/* Now restore the PCI headers */
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if (bridge) {
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if (pci_write_config_dword(bridge, bridge_pcix_cap + 0x8,
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bridge_header[(bridge_pcix_cap + 0x8) / 4])) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA bridge Upstream "
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"split transaction control, aborting.\n");
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goto free_bh;
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}
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if (pci_write_config_dword(bridge, bridge_pcix_cap + 0xc,
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bridge_header[(bridge_pcix_cap + 0xc) / 4])) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA bridge Downstream "
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"split transaction control, aborting.\n");
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goto free_bh;
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}
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/*
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* Bridge control register is at 0x3e, so we'll
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* naturally restore it last in this loop.
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*/
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for (i = 0; i < 16; ++i) {
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if (i * 4 == PCI_COMMAND)
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continue;
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if (pci_write_config_dword(bridge, i * 4, bridge_header[i])) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA bridge reg %x, "
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"aborting.\n", i);
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goto free_bh;
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}
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}
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if (pci_write_config_dword(bridge, PCI_COMMAND,
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bridge_header[PCI_COMMAND / 4])) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA bridge COMMAND, "
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"aborting.\n");
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goto free_bh;
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}
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}
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if (hca_pcix_cap) {
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if (pci_write_config_dword(mdev->pdev, hca_pcix_cap,
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hca_header[hca_pcix_cap / 4])) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA PCI-X "
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"command register, aborting.\n");
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goto free_bh;
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}
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}
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if (hca_pcie_cap) {
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devctl = hca_header[(hca_pcie_cap + PCI_EXP_DEVCTL) / 4];
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if (pcie_capability_write_word(mdev->pdev, PCI_EXP_DEVCTL,
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devctl)) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA PCI Express "
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"Device Control register, aborting.\n");
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goto free_bh;
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}
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linkctl = hca_header[(hca_pcie_cap + PCI_EXP_LNKCTL) / 4];
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if (pcie_capability_write_word(mdev->pdev, PCI_EXP_LNKCTL,
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linkctl)) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA PCI Express "
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"Link control register, aborting.\n");
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goto free_bh;
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}
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}
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for (i = 0; i < 16; ++i) {
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if (i * 4 == PCI_COMMAND)
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continue;
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if (pci_write_config_dword(mdev->pdev, i * 4, hca_header[i])) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA reg %x, "
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"aborting.\n", i);
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goto free_bh;
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}
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}
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if (pci_write_config_dword(mdev->pdev, PCI_COMMAND,
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hca_header[PCI_COMMAND / 4])) {
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err = -ENODEV;
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mthca_err(mdev, "Couldn't restore HCA COMMAND, "
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"aborting.\n");
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}
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free_bh:
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kfree(bridge_header);
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free_hca:
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kfree(hca_header);
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put_dev:
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pci_dev_put(bridge);
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return err;
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}
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