c05564c4d8
Android 13
228 lines
5.7 KiB
C
Executable file
228 lines
5.7 KiB
C
Executable file
/*
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* Copyright (C) 2013 Aeroflex Gaisler
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*
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* This driver supports the APBPS2 PS/2 core available in the GRLIB
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* VHDL IP core library.
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*
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* Full documentation of the APBPS2 core can be found here:
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* http://www.gaisler.com/products/grlib/grip.pdf
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*
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* See "Documentation/devicetree/bindings/input/ps2keyb-mouse-apbps2.txt" for
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* information on open firmware properties.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* Contributors: Daniel Hellstrom <daniel@gaisler.com>
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*/
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#include <linux/platform_device.h>
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#include <linux/of_device.h>
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#include <linux/module.h>
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#include <linux/serio.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/of_irq.h>
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#include <linux/device.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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struct apbps2_regs {
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u32 __iomem data; /* 0x00 */
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u32 __iomem status; /* 0x04 */
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u32 __iomem ctrl; /* 0x08 */
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u32 __iomem reload; /* 0x0c */
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};
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#define APBPS2_STATUS_DR (1<<0)
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#define APBPS2_STATUS_PE (1<<1)
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#define APBPS2_STATUS_FE (1<<2)
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#define APBPS2_STATUS_KI (1<<3)
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#define APBPS2_STATUS_RF (1<<4)
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#define APBPS2_STATUS_TF (1<<5)
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#define APBPS2_STATUS_TCNT (0x1f<<22)
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#define APBPS2_STATUS_RCNT (0x1f<<27)
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#define APBPS2_CTRL_RE (1<<0)
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#define APBPS2_CTRL_TE (1<<1)
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#define APBPS2_CTRL_RI (1<<2)
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#define APBPS2_CTRL_TI (1<<3)
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struct apbps2_priv {
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struct serio *io;
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struct apbps2_regs *regs;
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};
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static int apbps2_idx;
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static irqreturn_t apbps2_isr(int irq, void *dev_id)
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{
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struct apbps2_priv *priv = dev_id;
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unsigned long status, data, rxflags;
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irqreturn_t ret = IRQ_NONE;
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while ((status = ioread32be(&priv->regs->status)) & APBPS2_STATUS_DR) {
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data = ioread32be(&priv->regs->data);
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rxflags = (status & APBPS2_STATUS_PE) ? SERIO_PARITY : 0;
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rxflags |= (status & APBPS2_STATUS_FE) ? SERIO_FRAME : 0;
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/* clear error bits? */
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if (rxflags)
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iowrite32be(0, &priv->regs->status);
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serio_interrupt(priv->io, data, rxflags);
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ret = IRQ_HANDLED;
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}
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return ret;
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}
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static int apbps2_write(struct serio *io, unsigned char val)
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{
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struct apbps2_priv *priv = io->port_data;
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unsigned int tleft = 10000; /* timeout in 100ms */
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/* delay until PS/2 controller has room for more chars */
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while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) && tleft--)
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udelay(10);
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if ((ioread32be(&priv->regs->status) & APBPS2_STATUS_TF) == 0) {
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iowrite32be(val, &priv->regs->data);
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iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI | APBPS2_CTRL_TE,
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&priv->regs->ctrl);
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return 0;
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}
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return -ETIMEDOUT;
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}
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static int apbps2_open(struct serio *io)
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{
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struct apbps2_priv *priv = io->port_data;
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int limit;
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unsigned long tmp;
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/* clear error flags */
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iowrite32be(0, &priv->regs->status);
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/* Clear old data if available (unlikely) */
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limit = 1024;
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while ((ioread32be(&priv->regs->status) & APBPS2_STATUS_DR) && --limit)
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tmp = ioread32be(&priv->regs->data);
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/* Enable reciever and it's interrupt */
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iowrite32be(APBPS2_CTRL_RE | APBPS2_CTRL_RI, &priv->regs->ctrl);
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return 0;
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}
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static void apbps2_close(struct serio *io)
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{
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struct apbps2_priv *priv = io->port_data;
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/* stop interrupts at PS/2 HW level */
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iowrite32be(0, &priv->regs->ctrl);
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}
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/* Initialize one APBPS2 PS/2 core */
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static int apbps2_of_probe(struct platform_device *ofdev)
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{
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struct apbps2_priv *priv;
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int irq, err;
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u32 freq_hz;
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struct resource *res;
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priv = devm_kzalloc(&ofdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv) {
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dev_err(&ofdev->dev, "memory allocation failed\n");
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return -ENOMEM;
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}
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/* Find Device Address */
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res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
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priv->regs = devm_ioremap_resource(&ofdev->dev, res);
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if (IS_ERR(priv->regs))
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return PTR_ERR(priv->regs);
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/* Reset hardware, disable interrupt */
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iowrite32be(0, &priv->regs->ctrl);
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/* IRQ */
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irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
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err = devm_request_irq(&ofdev->dev, irq, apbps2_isr,
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IRQF_SHARED, "apbps2", priv);
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if (err) {
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dev_err(&ofdev->dev, "request IRQ%d failed\n", irq);
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return err;
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}
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/* Get core frequency */
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if (of_property_read_u32(ofdev->dev.of_node, "freq", &freq_hz)) {
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dev_err(&ofdev->dev, "unable to get core frequency\n");
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return -EINVAL;
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}
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/* Set reload register to core freq in kHz/10 */
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iowrite32be(freq_hz / 10000, &priv->regs->reload);
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priv->io = kzalloc(sizeof(struct serio), GFP_KERNEL);
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if (!priv->io)
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return -ENOMEM;
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priv->io->id.type = SERIO_8042;
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priv->io->open = apbps2_open;
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priv->io->close = apbps2_close;
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priv->io->write = apbps2_write;
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priv->io->port_data = priv;
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strlcpy(priv->io->name, "APBPS2 PS/2", sizeof(priv->io->name));
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snprintf(priv->io->phys, sizeof(priv->io->phys),
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"apbps2_%d", apbps2_idx++);
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dev_info(&ofdev->dev, "irq = %d, base = 0x%p\n", irq, priv->regs);
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serio_register_port(priv->io);
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platform_set_drvdata(ofdev, priv);
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return 0;
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}
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static int apbps2_of_remove(struct platform_device *of_dev)
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{
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struct apbps2_priv *priv = platform_get_drvdata(of_dev);
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serio_unregister_port(priv->io);
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return 0;
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}
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static const struct of_device_id apbps2_of_match[] = {
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{ .name = "GAISLER_APBPS2", },
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{ .name = "01_060", },
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{}
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};
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MODULE_DEVICE_TABLE(of, apbps2_of_match);
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static struct platform_driver apbps2_of_driver = {
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.driver = {
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.name = "grlib-apbps2",
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.of_match_table = apbps2_of_match,
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},
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.probe = apbps2_of_probe,
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.remove = apbps2_of_remove,
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};
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module_platform_driver(apbps2_of_driver);
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MODULE_AUTHOR("Aeroflex Gaisler AB.");
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MODULE_DESCRIPTION("GRLIB APBPS2 PS/2 serial I/O");
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MODULE_LICENSE("GPL");
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