578 lines
15 KiB
C
Executable file
578 lines
15 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2019 MediaTek Inc.
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*/
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#include "mdla_debug.h"
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#include "mdla.h"
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#include "mdla_hw_reg.h"
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#include "mdla_trace.h"
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#include "mdla_dvfs.h"
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#include "mdla_pmu.h"
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#include <linux/vmalloc.h>
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#include <linux/slab.h>
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#include <linux/mm.h>
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#include <linux/mman.h>
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#include <linux/module.h>
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#include <linux/fs.h>
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#include <linux/debugfs.h>
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#include <linux/dcache.h>
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#include <linux/delay.h>
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#include <linux/kthread.h>
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#include <linux/uaccess.h>
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#include <linux/string.h>
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#include <linux/io.h>
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#define ALGO_OF_MAX_POWER (3)
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/* global variables */
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int g_mdla_log_level = 1;
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unsigned int g_mdla_func_mask;
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static int mdla_log_level_set(void *data, u64 val)
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{
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g_mdla_log_level = val & 0xf;
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LOG_INF("g_mdla_log_level: %d\n", g_mdla_log_level);
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return 0;
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}
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static int mdla_log_level_get(void *data, u64 *val)
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{
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*val = g_mdla_log_level;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(mdla_debug_log_level_fops, mdla_log_level_get,
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mdla_log_level_set, "%llu\n");
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static int mdla_func_mask_set(void *data, u64 val)
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{
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g_mdla_func_mask = val & 0xffffffff;
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LOG_INF("g_func_mask: 0x%x\n", g_mdla_func_mask);
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return 0;
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}
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static int mdla_func_mask_get(void *data, u64 *val)
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{
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*val = g_mdla_func_mask;
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(mdla_debug_func_mask_fops, mdla_func_mask_get,
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mdla_func_mask_set, "%llu\n");
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#define IMPLEMENT_MDLA_DEBUGFS(name) \
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static int mdla_debug_## name ##_show(struct seq_file *s, void *unused)\
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{ \
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mdla_dump_## name(s); \
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return 0; \
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} \
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static int mdla_debug_## name ##_open(struct inode *inode, struct file *file) \
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{ \
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return single_open(file, mdla_debug_ ## name ## _show, \
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inode->i_private); \
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} \
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static const struct file_operations mdla_debug_ ## name ## _fops = { \
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.open = mdla_debug_ ## name ## _open, \
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.read = seq_read, \
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.llseek = seq_lseek, \
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.release = seq_release, \
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}
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IMPLEMENT_MDLA_DEBUGFS(register);
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IMPLEMENT_MDLA_DEBUGFS(opp_table);
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#undef IMPLEMENT_MDLA_DEBUGFS
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static int mdla_debug_power_show(struct seq_file *s, void *unused)
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{
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mdla_dump_power(s);
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return 0;
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}
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static int mdla_debug_power_open(struct inode *inode, struct file *file)
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{
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return single_open(file, mdla_debug_power_show, inode->i_private);
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}
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static ssize_t mdla_debug_power_write(struct file *flip,
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const char __user *buffer,
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size_t count, loff_t *f_pos)
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{
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char *tmp, *token, *cursor;
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int ret, i, param;
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const int max_arg = 5;
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unsigned int args[max_arg];
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tmp = kzalloc(count + 1, GFP_KERNEL);
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if (!tmp)
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return -ENOMEM;
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ret = copy_from_user(tmp, buffer, count);
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if (ret) {
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LOG_ERR("copy_from_user failed, ret=%d\n", ret);
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goto out;
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}
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tmp[count] = '\0';
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cursor = tmp;
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/* parse a command */
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token = strsep(&cursor, " ");
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if (strcmp(token, "fix_opp") == 0)
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param = MDLA_POWER_PARAM_FIX_OPP;
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else if (strcmp(token, "dvfs_debug") == 0)
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param = MDLA_POWER_PARAM_DVFS_DEBUG;
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else if (strcmp(token, "jtag") == 0)
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param = MDLA_POWER_PARAM_JTAG;
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else if (strcmp(token, "lock") == 0)
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param = MDLA_POWER_PARAM_LOCK;
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else if (strcmp(token, "volt_step") == 0)
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param = MDLA_POWER_PARAM_VOLT_STEP;
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else if (strcmp(token, "power_hal") == 0)
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param = MDLA_POWER_HAL_CTL;
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else if (strcmp(token, "eara") == 0)
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param = MDLA_EARA_CTL;
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else {
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ret = -EINVAL;
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LOG_ERR("no power param[%s]!\n", token);
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goto out;
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}
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/* parse arguments */
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for (i = 0; i < max_arg && (token = strsep(&cursor, " ")); i++) {
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ret = kstrtouint(token, 10, &args[i]);
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if (ret) {
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LOG_ERR("fail to parse args[%d]\n", i);
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goto out;
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}
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}
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mdla_set_power_parameter(param, i, args);
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ret = count;
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out:
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kfree(tmp);
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return ret;
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}
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static const struct file_operations mdla_debug_power_fops = {
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.open = mdla_debug_power_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = seq_release,
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.write = mdla_debug_power_write,
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};
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static int mdla_debug_prof_show(struct seq_file *s, void *unused)
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{
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mdla_dump_prof(s);
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return 0;
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}
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static int mdla_debug_prof_open(struct inode *inode, struct file *file)
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{
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return single_open(file, mdla_debug_prof_show, inode->i_private);
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}
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static ssize_t mdla_debug_prof_write(struct file *flip,
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const char __user *buffer,
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size_t count, loff_t *f_pos)
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{
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pmu_reset_saved_counter();
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return count;
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}
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static const struct file_operations mdla_debug_prof_fops = {
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.open = mdla_debug_prof_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = seq_release,
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.write = mdla_debug_prof_write,
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};
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#define DEFINE_MDLA_DEBUGFS(name) \
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struct dentry *mdla_d##name
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DEFINE_MDLA_DEBUGFS(root);
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DEFINE_MDLA_DEBUGFS(timeout);
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DEFINE_MDLA_DEBUGFS(e1_detect_timeout);
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DEFINE_MDLA_DEBUGFS(e1_detect_count);
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DEFINE_MDLA_DEBUGFS(poweroff_time);
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DEFINE_MDLA_DEBUGFS(klog);
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DEFINE_MDLA_DEBUGFS(register);
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DEFINE_MDLA_DEBUGFS(opp_table);
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DEFINE_MDLA_DEBUGFS(power);
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DEFINE_MDLA_DEBUGFS(eng0);
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DEFINE_MDLA_DEBUGFS(eng1);
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DEFINE_MDLA_DEBUGFS(eng2);
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DEFINE_MDLA_DEBUGFS(eng11);
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DEFINE_MDLA_DEBUGFS(power);
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DEFINE_MDLA_DEBUGFS(prof_start);
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DEFINE_MDLA_DEBUGFS(prof);
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DEFINE_MDLA_DEBUGFS(period);
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DEFINE_MDLA_DEBUGFS(cmd_trace);
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DEFINE_MDLA_DEBUGFS(op_trace);
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DEFINE_MDLA_DEBUGFS(c1);
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DEFINE_MDLA_DEBUGFS(c2);
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DEFINE_MDLA_DEBUGFS(c3);
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DEFINE_MDLA_DEBUGFS(c4);
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DEFINE_MDLA_DEBUGFS(c5);
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DEFINE_MDLA_DEBUGFS(c6);
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DEFINE_MDLA_DEBUGFS(c7);
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DEFINE_MDLA_DEBUGFS(c8);
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DEFINE_MDLA_DEBUGFS(c9);
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DEFINE_MDLA_DEBUGFS(c10);
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DEFINE_MDLA_DEBUGFS(c11);
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DEFINE_MDLA_DEBUGFS(c12);
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DEFINE_MDLA_DEBUGFS(c13);
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DEFINE_MDLA_DEBUGFS(c14);
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DEFINE_MDLA_DEBUGFS(c15);
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u32 mdla_klog;
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void mdla_debugfs_init(void)
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{
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int ret;
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mdla_klog = 0x40; /* print timeout info by default */
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mdla_droot = debugfs_create_dir("mdla", NULL);
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ret = IS_ERR_OR_NULL(mdla_droot);
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if (ret) {
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LOG_ERR("failed to create debug dir.\n");
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return;
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}
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mdla_dtimeout = debugfs_create_u32("timeout", 0660, mdla_droot,
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&mdla_timeout);
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mdla_de1_detect_timeout = debugfs_create_u32("e1_detect_timeout",
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0660, mdla_droot, &mdla_e1_detect_timeout);
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mdla_de1_detect_timeout = debugfs_create_u32("e1_detect_count",
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0440, mdla_droot, &mdla_e1_detect_count);
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mdla_dpoweroff_time = debugfs_create_u32("poweroff_time",
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0660, mdla_droot, &mdla_poweroff_time);
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mdla_dklog = debugfs_create_u32("klog", 0660, mdla_droot,
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&mdla_klog);
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mdla_deng0 = debugfs_create_u32("eng0",
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0660, mdla_droot, &cfg_eng0);
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mdla_deng1 = debugfs_create_u32("eng1",
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0660, mdla_droot, &cfg_eng1);
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mdla_deng2 = debugfs_create_u32("eng2",
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0660, mdla_droot, &cfg_eng2);
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mdla_deng11 = debugfs_create_u32("eng11",
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0660, mdla_droot, &cfg_eng11);
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/* Prof */
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mdla_dprof_start = debugfs_create_u32("prof_start",
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0660, mdla_droot, &cfg_timer_en);
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mdla_dc1 = debugfs_create_u32("c1", 0660,
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mdla_droot, &cfg_pmu_event[0]);
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mdla_dc2 = debugfs_create_u32("c2", 0660,
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mdla_droot, &cfg_pmu_event[1]);
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mdla_dc3 = debugfs_create_u32("c3", 0660,
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mdla_droot, &cfg_pmu_event[2]);
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mdla_dc4 = debugfs_create_u32("c4", 0660,
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mdla_droot, &cfg_pmu_event[3]);
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mdla_dc5 = debugfs_create_u32("c5", 0660,
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mdla_droot, &cfg_pmu_event[4]);
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mdla_dc6 = debugfs_create_u32("c6", 0660,
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mdla_droot, &cfg_pmu_event[5]);
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mdla_dc7 = debugfs_create_u32("c7", 0660,
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mdla_droot, &cfg_pmu_event[6]);
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mdla_dc8 = debugfs_create_u32("c8", 0660,
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mdla_droot, &cfg_pmu_event[7]);
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mdla_dc9 = debugfs_create_u32("c9", 0660,
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mdla_droot, &cfg_pmu_event[8]);
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mdla_dc10 = debugfs_create_u32("c10", 0660,
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mdla_droot, &cfg_pmu_event[9]);
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mdla_dc11 = debugfs_create_u32("c11",
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0660, mdla_droot, &cfg_pmu_event[10]);
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mdla_dc12 = debugfs_create_u32("c12",
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0660, mdla_droot, &cfg_pmu_event[11]);
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mdla_dc13 = debugfs_create_u32("c13",
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0660, mdla_droot, &cfg_pmu_event[12]);
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mdla_dc14 = debugfs_create_u32("c14",
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0660, mdla_droot, &cfg_pmu_event[13]);
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mdla_dc15 = debugfs_create_u32("c15",
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0660, mdla_droot, &cfg_pmu_event[14]);
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mdla_dperiod = debugfs_create_u64("period",
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0660, mdla_droot, &cfg_period);
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mdla_dcmd_trace = debugfs_create_u32("cmd_trace",
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0660, mdla_droot, &cfg_cmd_trace);
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mdla_dop_trace = debugfs_create_u32("op_trace",
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0660, mdla_droot, &cfg_op_trace);
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#define CREATE_MDLA_DEBUGFS(name) \
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{ \
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mdla_d##name = debugfs_create_file(#name, 0644, \
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mdla_droot, \
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NULL, &mdla_debug_ ## name ## _fops); \
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if (IS_ERR_OR_NULL(mdla_d##name)) \
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LOG_ERR("failed to create debug file[" #name "].\n"); \
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}
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CREATE_MDLA_DEBUGFS(register);
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CREATE_MDLA_DEBUGFS(opp_table);
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CREATE_MDLA_DEBUGFS(power);
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CREATE_MDLA_DEBUGFS(prof);
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#undef CREATE_MDLA_DEBUGFS
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cfg_eng0 = 0x0;
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cfg_eng1 = 0x0;
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cfg_eng2 = 0x0;
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cfg_eng11 = 0x600;
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}
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void mdla_debugfs_exit(void)
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{
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#define REMOVE_MDLA_DEBUGFS(name) \
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debugfs_remove(mdla_d##name)
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REMOVE_MDLA_DEBUGFS(timeout);
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REMOVE_MDLA_DEBUGFS(poweroff_time);
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REMOVE_MDLA_DEBUGFS(klog);
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REMOVE_MDLA_DEBUGFS(register);
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REMOVE_MDLA_DEBUGFS(opp_table);
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REMOVE_MDLA_DEBUGFS(power);
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REMOVE_MDLA_DEBUGFS(prof_start);
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REMOVE_MDLA_DEBUGFS(prof);
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REMOVE_MDLA_DEBUGFS(period);
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REMOVE_MDLA_DEBUGFS(cmd_trace);
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REMOVE_MDLA_DEBUGFS(op_trace);
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REMOVE_MDLA_DEBUGFS(eng0);
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REMOVE_MDLA_DEBUGFS(eng1);
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REMOVE_MDLA_DEBUGFS(eng2);
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REMOVE_MDLA_DEBUGFS(eng11);
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REMOVE_MDLA_DEBUGFS(c1);
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REMOVE_MDLA_DEBUGFS(c2);
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REMOVE_MDLA_DEBUGFS(c3);
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REMOVE_MDLA_DEBUGFS(c4);
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REMOVE_MDLA_DEBUGFS(c5);
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REMOVE_MDLA_DEBUGFS(c6);
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REMOVE_MDLA_DEBUGFS(c7);
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REMOVE_MDLA_DEBUGFS(c8);
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REMOVE_MDLA_DEBUGFS(c9);
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REMOVE_MDLA_DEBUGFS(c10);
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REMOVE_MDLA_DEBUGFS(c11);
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REMOVE_MDLA_DEBUGFS(c12);
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REMOVE_MDLA_DEBUGFS(c13);
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REMOVE_MDLA_DEBUGFS(c14);
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REMOVE_MDLA_DEBUGFS(c15);
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REMOVE_MDLA_DEBUGFS(root);
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}
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#define dump_reg_top(name) \
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mdla_timeout_debug("%s: %.8x\n", #name, mdla_reg_read(name))
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#define dump_reg_cfg(name) \
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mdla_timeout_debug("%s: %.8x\n", #name, mdla_cfg_read(name))
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void dump_timeout_debug_info(void)
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{
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u32 mreg_top_g_idle, c2r_exe_st, ste_debug_if_1;
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int i;
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mreg_top_g_idle = mdla_reg_read(MREG_TOP_G_IDLE);
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c2r_exe_st = mdla_reg_read(0x0000);
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ste_debug_if_1 = mdla_reg_read(0x0EA8);
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if (((ste_debug_if_1&0x1C0) != 0x0 && (ste_debug_if_1&0x3) == 0x3)) {
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mdla_timeout_debug(
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"Matched, %s, mdla_timeout:%d, mreg_top_g_idle: %08x, c2r_exe_st: %08x, ste_debug_if_1: %08x\n",
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__func__, mdla_timeout,
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mreg_top_g_idle, c2r_exe_st, ste_debug_if_1);
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} else {
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mdla_timeout_debug(
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"Not match, %s, mdla_timeout:%d, mreg_top_g_idle: %08x, c2r_exe_st: %08x, ste_debug_if_1: %08x\n",
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__func__, mdla_timeout,
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mreg_top_g_idle, c2r_exe_st, ste_debug_if_1);
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}
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mdla_timeout_debug("0x19000148: %08X\n",
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ioread32(apu_conn_top + 0x148));
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mdla_timeout_debug("0x19000150: %08X\n",
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ioread32(apu_conn_top + 0x150));
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mdla_timeout_debug("0x1902006C: %08X\n",
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ioread32(apu_conn_top + 0x2006C));
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mdla_timeout_debug("0x19020070: %08X\n",
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ioread32(apu_conn_top + 0x20070));
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for (i = 0x0000; i < 0x1000; i += 4)
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mdla_timeout_debug("0x1938%04X: %08X\n", i, mdla_cfg_read(i));
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for (i = 0x0000; i < 0x1000; i += 4)
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mdla_timeout_debug("0x1939%04X: %08X\n", i, mdla_reg_read(i));
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}
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void mdla_dump_reg(void)
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{
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mdla_timeout_debug("mdla_timeout\n");
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// TODO: too many registers, dump only debug required ones.
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dump_reg_cfg(MDLA_CG_CON);
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dump_reg_cfg(MDLA_SW_RST);
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dump_reg_cfg(MDLA_MBIST_MODE0);
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dump_reg_cfg(MDLA_MBIST_MODE1);
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dump_reg_cfg(MDLA_MBIST_CTL);
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dump_reg_cfg(MDLA_RP_OK0);
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dump_reg_cfg(MDLA_RP_OK1);
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dump_reg_cfg(MDLA_RP_OK2);
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dump_reg_cfg(MDLA_RP_OK3);
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dump_reg_cfg(MDLA_RP_FAIL0);
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dump_reg_cfg(MDLA_RP_FAIL1);
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dump_reg_cfg(MDLA_RP_FAIL2);
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dump_reg_cfg(MDLA_RP_FAIL3);
|
|
dump_reg_cfg(MDLA_MBIST_FAIL0);
|
|
dump_reg_cfg(MDLA_MBIST_FAIL1);
|
|
dump_reg_cfg(MDLA_MBIST_FAIL2);
|
|
dump_reg_cfg(MDLA_MBIST_FAIL3);
|
|
dump_reg_cfg(MDLA_MBIST_FAIL4);
|
|
dump_reg_cfg(MDLA_MBIST_FAIL5);
|
|
dump_reg_cfg(MDLA_MBIST_DONE0);
|
|
dump_reg_cfg(MDLA_MBIST_DONE1);
|
|
dump_reg_cfg(MDLA_MBIST_DEFAULT_DELSEL);
|
|
dump_reg_cfg(MDLA_SRAM_DELSEL0);
|
|
dump_reg_cfg(MDLA_SRAM_DELSEL1);
|
|
dump_reg_cfg(MDLA_RP_RST);
|
|
dump_reg_cfg(MDLA_RP_CON);
|
|
dump_reg_cfg(MDLA_RP_PRE_FUSE);
|
|
dump_reg_cfg(MDLA_AXI_CTRL);
|
|
dump_reg_cfg(MDLA_AXI1_CTRL);
|
|
|
|
dump_reg_top(MREG_TOP_G_REV);
|
|
dump_reg_top(MREG_TOP_G_INTP0);
|
|
dump_reg_top(MREG_TOP_G_INTP1);
|
|
dump_reg_top(MREG_TOP_G_INTP2);
|
|
dump_reg_top(MREG_TOP_G_CDMA0);
|
|
dump_reg_top(MREG_TOP_G_CDMA1);
|
|
dump_reg_top(MREG_TOP_G_CDMA2);
|
|
dump_reg_top(MREG_TOP_G_CDMA3);
|
|
dump_reg_top(MREG_TOP_G_CDMA4);
|
|
dump_reg_top(MREG_TOP_G_CDMA5);
|
|
dump_reg_top(MREG_TOP_G_CDMA6);
|
|
dump_reg_top(MREG_TOP_G_CUR0);
|
|
dump_reg_top(MREG_TOP_G_CUR1);
|
|
dump_reg_top(MREG_TOP_G_FIN0);
|
|
dump_reg_top(MREG_TOP_G_FIN1);
|
|
dump_reg_top(MREG_TOP_G_IDLE);
|
|
|
|
/* for DCM and CG */
|
|
dump_reg_top(MREG_TOP_ENG0);
|
|
dump_reg_top(MREG_TOP_ENG1);
|
|
dump_reg_top(MREG_TOP_ENG2);
|
|
dump_reg_top(MREG_TOP_ENG11);
|
|
dump_timeout_debug_info();
|
|
}
|
|
|
|
void mdla_dump_buf(int mask, void *kva, int group, u32 size)
|
|
{
|
|
if (mdla_klog & mask) {
|
|
print_hex_dump_debug("mdla-buf: ",
|
|
DUMP_PREFIX_OFFSET, 32, group, kva, size, 0);
|
|
}
|
|
}
|
|
|
|
void mdla_dump_ce(struct command_entry *ce)
|
|
{
|
|
int i;
|
|
char *ptr;
|
|
|
|
if (ce == NULL)
|
|
return;
|
|
if (!(mdla_klog & MDLA_DBG_TIMEOUT))
|
|
return;
|
|
if (ce->kva == NULL)
|
|
return;
|
|
|
|
ptr = (char *)ce->kva;
|
|
|
|
|
|
for (i = 0; i < ce->count; i++) {
|
|
mdla_timeout_debug("mdla-buf: %s: cmd_id: %u, cmd[%d/%d], kva=%p\n",
|
|
__func__, ce->id, i, ce->count, ptr);
|
|
mdla_dump_buf(MDLA_DBG_TIMEOUT, ptr, 4, MREG_CMD_SIZE);
|
|
ptr += MREG_CMD_SIZE;
|
|
}
|
|
}
|
|
|
|
int mdla_dump_register(struct seq_file *s)
|
|
{
|
|
#define seq_reg_top(name) \
|
|
seq_printf(s, "%s: %.8x\n", #name, mdla_reg_read(name))
|
|
|
|
#define seq_reg_cfg(name) \
|
|
seq_printf(s, "%s: %.8x\n", #name, mdla_cfg_read(name))
|
|
|
|
seq_reg_cfg(MDLA_CG_CON);
|
|
seq_reg_cfg(MDLA_SW_RST);
|
|
seq_reg_cfg(MDLA_MBIST_MODE0);
|
|
seq_reg_cfg(MDLA_MBIST_MODE1);
|
|
seq_reg_cfg(MDLA_MBIST_CTL);
|
|
seq_reg_cfg(MDLA_RP_OK0);
|
|
seq_reg_cfg(MDLA_RP_OK1);
|
|
seq_reg_cfg(MDLA_RP_OK2);
|
|
seq_reg_cfg(MDLA_RP_OK3);
|
|
seq_reg_cfg(MDLA_RP_FAIL0);
|
|
seq_reg_cfg(MDLA_RP_FAIL1);
|
|
seq_reg_cfg(MDLA_RP_FAIL2);
|
|
seq_reg_cfg(MDLA_RP_FAIL3);
|
|
seq_reg_cfg(MDLA_MBIST_FAIL0);
|
|
seq_reg_cfg(MDLA_MBIST_FAIL1);
|
|
seq_reg_cfg(MDLA_MBIST_FAIL2);
|
|
seq_reg_cfg(MDLA_MBIST_FAIL3);
|
|
seq_reg_cfg(MDLA_MBIST_FAIL4);
|
|
seq_reg_cfg(MDLA_MBIST_FAIL5);
|
|
seq_reg_cfg(MDLA_MBIST_DONE0);
|
|
seq_reg_cfg(MDLA_MBIST_DONE1);
|
|
seq_reg_cfg(MDLA_MBIST_DEFAULT_DELSEL);
|
|
seq_reg_cfg(MDLA_SRAM_DELSEL0);
|
|
seq_reg_cfg(MDLA_SRAM_DELSEL1);
|
|
seq_reg_cfg(MDLA_RP_RST);
|
|
seq_reg_cfg(MDLA_RP_CON);
|
|
seq_reg_cfg(MDLA_RP_PRE_FUSE);
|
|
seq_reg_cfg(MDLA_AXI_CTRL);
|
|
seq_reg_cfg(MDLA_AXI1_CTRL);
|
|
|
|
seq_reg_top(MREG_TOP_G_REV);
|
|
seq_reg_top(MREG_TOP_G_INTP0);
|
|
seq_reg_top(MREG_TOP_G_INTP1);
|
|
seq_reg_top(MREG_TOP_G_INTP2);
|
|
seq_reg_top(MREG_TOP_G_CDMA0);
|
|
seq_reg_top(MREG_TOP_G_CDMA1);
|
|
seq_reg_top(MREG_TOP_G_CDMA2);
|
|
seq_reg_top(MREG_TOP_G_CDMA3);
|
|
seq_reg_top(MREG_TOP_G_CDMA4);
|
|
seq_reg_top(MREG_TOP_G_CDMA5);
|
|
seq_reg_top(MREG_TOP_G_CDMA6);
|
|
seq_reg_top(MREG_TOP_G_CUR0);
|
|
seq_reg_top(MREG_TOP_G_CUR1);
|
|
seq_reg_top(MREG_TOP_G_FIN0);
|
|
seq_reg_top(MREG_TOP_G_FIN1);
|
|
|
|
return 0;
|
|
}
|
|
|