236 lines
6.1 KiB
C
Executable file
236 lines
6.1 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2021 MediaTek Inc.
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*/
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#include <generated/autoconf.h>
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#include <linux/cdev.h>
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#include <linux/delay.h>
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#include <linux/debugfs.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#include <linux/preempt.h>
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#include <linux/uaccess.h>
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#include "mtk_devinfo.h"
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#include <mt-plat/upmu_common.h>
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#include <mach/mtk_pmic.h>
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#include "include/pmic.h"
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#include "include/pmic_irq.h"
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#include "include/pmic_throttling_dlpt.h"
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#include "include/pmic_debugfs.h"
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#ifdef CONFIG_MTK_AUXADC_INTF
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#include <mt-plat/mtk_auxadc_intf.h>
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#endif /* CONFIG_MTK_AUXADC_INTF */
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#ifdef CONFIG_MTK_PMIC_WRAP_HAL
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#include "pwrap_hal.h"
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#endif
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#if defined(CONFIG_MACH_MT6739)
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void vmd1_pmic_setting_on(void)
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{
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unsigned int vcore_vosel = 0;
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unsigned int vmodem_vosel = 0;
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unsigned int segment = get_devinfo_with_index(28);
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unsigned char vcore_segment = (unsigned char)((segment & 0xC0000000) >> 30);
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unsigned char vmodem_segment = (unsigned char)((segment & 0x08000000) >> 27);
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if ((vcore_segment & 0x3) == 0x1 ||
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(vcore_segment & 0x3) == 0x2) {
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/* VCORE 1.15V: 0x65 */
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vcore_vosel = 0x65;
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} else {
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/* VCORE 1.20V: 0x6D */
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vcore_vosel = 0x6D;
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}
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#if defined(CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE_NAMES)
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/* PMIC special flavor project */
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if (strncmp(CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE_NAMES,
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"mediatek/k39tv1_ctightening", 27) == 0) {
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if ((vcore_segment & 0x3) == 0x1 ||
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(vcore_segment & 0x3) == 0x2) {
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/* VCORE 1.11250V: 0x5F */
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vcore_vosel = 0x5F;
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} else {
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/* VCORE 1.15625V: 0x66 */
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vcore_vosel = 0x66;
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}
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} else if (strncmp(CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE_NAMES,
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"mediatek/k39v1_ctightening", 26) == 0) {
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if ((vcore_segment & 0x3) == 0x1 ||
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(vcore_segment & 0x3) == 0x2) {
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/* VCORE 1.0875V: 0x5B */
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vcore_vosel = 0x5B;
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} else {
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/* VCORE 1.13125V: 0x62 */
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vcore_vosel = 0x62;
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}
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} else if (strncmp(CONFIG_BUILD_ARM64_APPENDED_DTB_IMAGE_NAMES,
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"mediatek/k39v1_bsp_ctighten", 27) == 0) {
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if ((vcore_segment & 0x3) == 0x1 ||
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(vcore_segment & 0x3) == 0x2) {
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/* VCORE 1.0875V: 0x5B */
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vcore_vosel = 0x5B;
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} else {
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/* VCORE 1.13125V: 0x62 */
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vcore_vosel = 0x62;
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}
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}
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#endif
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if (!vmodem_segment)
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vmodem_vosel = 0x6F;/* VMODEM 1.19375V: 0x6F */
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else
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vmodem_vosel = 0x68;/* VMODEM 1.15V: 0x68 */
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pr_notice("%s vcore vosel = 0x%x, da_vosel = 0x%x", __func__,
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pmic_get_register_value(PMIC_RG_BUCK_VCORE_VOSEL),
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pmic_get_register_value(PMIC_DA_VCORE_VOSEL));
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/* 1.Call PMIC driver API configure VMODEM voltage */
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pmic_set_register_value(PMIC_RG_BUCK_VMODEM_VOSEL, vmodem_vosel);
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pr_notice("%s vmodem vosel = 0x%x, da_vosel = 0x%x", __func__,
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pmic_get_register_value(PMIC_RG_BUCK_VMODEM_VOSEL),
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pmic_get_register_value(PMIC_DA_VMODEM_VOSEL));
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}
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#else
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void vmd1_pmic_setting_on(void)
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{
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/* Vcore: 0x2D, 0.8V */
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/* Vmodem: 0x30, 0.8V */
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unsigned int vcore_vosel = 0x2D, vmodem_vosel = 0x30;
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if (pmic_get_register_value(PMIC_DA_VCORE_VOSEL) != vcore_vosel)
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pr_notice("%s vcore vosel = 0x%x, da_vosel = 0x%x",
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__func__, pmic_get_register_value(PMIC_RG_BUCK_VCORE_VOSEL),
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pmic_get_register_value(PMIC_DA_VCORE_VOSEL));
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/* 1.Call PMIC driver API configure VMODEM voltage */
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pmic_set_register_value(PMIC_RG_BUCK_VMODEM_VOSEL, vmodem_vosel);
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if (pmic_get_register_value(PMIC_DA_VMODEM_VOSEL) != vmodem_vosel)
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pr_notice("%s vmodem vosel = 0x%x, da_vosel = 0x%x",
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__func__, pmic_get_register_value(PMIC_RG_BUCK_VMODEM_VOSEL),
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pmic_get_register_value(PMIC_DA_VMODEM_VOSEL));
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}
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#endif /* CONFIG_MACH_MT6739 */
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void vmd1_pmic_setting_off(void)
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{
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PMICLOG("%s\n", __func__);
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}
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void wk_pmic_enable_sdn_delay(void)
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{
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pmic_set_register_value(PMIC_TMA_KEY, 0x9CA8);
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pmic_set_register_value(PMIC_RG_SDN_DLY_ENB, 0);
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pmic_set_register_value(PMIC_TMA_KEY, 0);
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}
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int vcore_pmic_set_mode(unsigned char mode)
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{
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unsigned char ret = 0;
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pmic_set_register_value(PMIC_RG_VCORE_FPWM, mode);
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ret = pmic_get_register_value(PMIC_RG_VCORE_FPWM);
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return (ret == mode) ? (0) : (-1);
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}
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int vproc_pmic_set_mode(unsigned char mode)
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{
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unsigned char ret = 0;
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pmic_set_register_value(PMIC_RG_VPROC_FPWM, mode);
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ret = pmic_get_register_value(PMIC_RG_VPROC_FPWM);
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return (ret == mode) ? (0) : (-1);
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}
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/* [Export API] */
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/* Support for MT6357 CRV/MRV */
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unsigned int is_pmic_mrv(void)
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{
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unsigned int g_is_mrv = 0;
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pmic_read_interface(PMIC_RG_TOP2_RSV0_ADDR,
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&g_is_mrv, 0x1, 15);
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return g_is_mrv;
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}
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void pmic_enable_smart_reset(unsigned char smart_en, unsigned char smart_sdn_en)
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{
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pmic_set_register_value(PMIC_RG_SMART_RST_MODE, smart_en);
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pmic_set_register_value(PMIC_RG_SMART_RST_SDN_EN, smart_sdn_en);
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pr_info("[%s] smart_en:%d, smart_sdn_en:%d\n",
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__func__, smart_en, smart_sdn_en);
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}
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int pmic_tracking_init(void)
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{
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int ret = 0;
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#if 0
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/* 0.1V */
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pmic_set_register_value(PMIC_RG_VSRAM_VCORE_VOSEL_OFFSET, 0x10);
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/* 0.025V */
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pmic_set_register_value(PMIC_RG_VSRAM_VCORE_VOSEL_DELTA, 0x4);
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/* 1.0V */
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pmic_set_register_value(PMIC_RG_VSRAM_VCORE_VOSEL_ON_HB, 0x60);
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/* 0.8V */
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pmic_set_register_value(PMIC_RG_VSRAM_VCORE_VOSEL_ON_LB, 0x40);
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/* 0.65V */
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pmic_set_register_value(PMIC_RG_VSRAM_VCORE_VOSEL_SLEEP_LB, 0x28);
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#endif
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#if 0
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ret = enable_vsram_vcore_hw_tracking(1);
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PMICLOG("Enable VSRAM_VCORE hw tracking\n");
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#else
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PMICLOG("VSRAM_VCORE hw tracking not support in MT6357\n");
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#endif
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return ret;
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}
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/*****************************************************************************
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* PMIC charger detection
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******************************************************************************/
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unsigned int upmu_get_rgs_chrdet(void)
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{
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unsigned int val = 0;
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val = pmic_get_register_value(PMIC_RGS_CHRDET);
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PMICLOG("[%s] CHRDET status = %d\n", __func__, val);
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return val;
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}
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int is_ext_vbat_boost_exist(void)
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{
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return 0;
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}
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int is_ext_swchr_exist(void)
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{
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return 0;
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}
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/*****************************************************************************
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* Enternal BUCK status
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******************************************************************************/
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int is_ext_buck_gpio_exist(void)
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{
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return pmic_get_register_value(PMIC_RG_STRUP_EXT_PMIC_EN);
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}
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MODULE_AUTHOR("Jeter Chen");
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MODULE_DESCRIPTION("MT PMIC Device Driver");
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MODULE_LICENSE("GPL");
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