639 lines
15 KiB
C
Executable file
639 lines
15 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Joey Pan <joey.pan@mediatek.com>
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*/
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#ifndef __DISP_SESSION_H
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#define __DISP_SESSION_H
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#include <linux/types.h>
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#define DISP_SESSION_DEVICE "mtk_disp_mgr"
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#define DISP_NO_ION_FD ((int)(~0U>>1))
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#define DISP_NO_USE_LAEYR_ID ((int)(~0U>>1))
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#define MAKE_DISP_FORMAT_ID(id, bpp) (((id) << 8) | (bpp))
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#define DISP_SESSION_MODE(id) (((id)>>24)&0xff)
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#define DISP_SESSION_TYPE(id) (((id)>>16)&0xff)
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#define DISP_SESSION_DEV(id) ((id)&0xff)
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#define MAKE_DISP_SESSION(type, dev) (unsigned int)((type)<<16 | (dev))
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#define RSZ_RES_LIST_NUM 8
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/* /=========================== */
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/* structure declarations */
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/* /=========================== */
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enum DISP_IF_TYPE {
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DISP_IF_TYPE_DBI = 0,
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DISP_IF_TYPE_DPI,
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DISP_IF_TYPE_DSI0,
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DISP_IF_TYPE_DSI1,
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DISP_IF_TYPE_DSIDUAL,
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DISP_IF_HDMI = 7,
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DISP_IF_HDMI_SMARTBOOK,
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DISP_IF_MHL,
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DISP_IF_EPD,
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DISP_IF_SLIMPORT
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};
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enum DISP_IF_FORMAT {
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DISP_IF_FORMAT_RGB565 = 0,
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DISP_IF_FORMAT_RGB666,
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DISP_IF_FORMAT_RGB888
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};
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enum DISP_IF_MODE {
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DISP_IF_MODE_VIDEO = 0,
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DISP_IF_MODE_COMMAND
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};
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enum DISP_ORIENTATION {
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DISP_ORIENTATION_0 = 0,
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DISP_ORIENTATION_90 = 1,
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DISP_ORIENTATION_180 = 2,
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DISP_ORIENTATION_270 = 3,
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};
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enum DISP_FORMAT {
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DISP_FORMAT_UNKNOWN = 0,
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DISP_FORMAT_RGB565 = MAKE_DISP_FORMAT_ID(1, 2),
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DISP_FORMAT_RGB888 = MAKE_DISP_FORMAT_ID(2, 3),
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DISP_FORMAT_BGR888 = MAKE_DISP_FORMAT_ID(3, 3),
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DISP_FORMAT_ARGB8888 = MAKE_DISP_FORMAT_ID(4, 4),
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DISP_FORMAT_ABGR8888 = MAKE_DISP_FORMAT_ID(5, 4),
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DISP_FORMAT_RGBA8888 = MAKE_DISP_FORMAT_ID(6, 4),
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DISP_FORMAT_BGRA8888 = MAKE_DISP_FORMAT_ID(7, 4),
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DISP_FORMAT_YUV422 = MAKE_DISP_FORMAT_ID(8, 2),
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DISP_FORMAT_XRGB8888 = MAKE_DISP_FORMAT_ID(9, 4),
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DISP_FORMAT_XBGR8888 = MAKE_DISP_FORMAT_ID(10, 4),
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DISP_FORMAT_RGBX8888 = MAKE_DISP_FORMAT_ID(11, 4),
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DISP_FORMAT_BGRX8888 = MAKE_DISP_FORMAT_ID(12, 4),
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DISP_FORMAT_UYVY = MAKE_DISP_FORMAT_ID(13, 2),
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DISP_FORMAT_YUV420_P = MAKE_DISP_FORMAT_ID(14, 2),
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DISP_FORMAT_YV12 = MAKE_DISP_FORMAT_ID(16, 1), /* BPP = 1.5 */
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DISP_FORMAT_PARGB8888 = MAKE_DISP_FORMAT_ID(17, 4),
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DISP_FORMAT_PABGR8888 = MAKE_DISP_FORMAT_ID(18, 4),
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DISP_FORMAT_PRGBA8888 = MAKE_DISP_FORMAT_ID(19, 4),
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DISP_FORMAT_PBGRA8888 = MAKE_DISP_FORMAT_ID(20, 4),
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DISP_FORMAT_DIM = MAKE_DISP_FORMAT_ID(21, 0),
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DISP_FORMAT_RGBA1010102 = MAKE_DISP_FORMAT_ID(22, 4),
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DISP_FORMAT_PRGBA1010102 = MAKE_DISP_FORMAT_ID(23, 4),
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DISP_FORMAT_RGBA_FP16 = MAKE_DISP_FORMAT_ID(24, 8),
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DISP_FORMAT_PRGBA_FP16 = MAKE_DISP_FORMAT_ID(25, 8),
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DISP_FORMAT_NUM = MAKE_DISP_FORMAT_ID(26, 0),
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DISP_FORMAT_BPP_MASK = 0xFF,
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};
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enum DISP_LAYER_TYPE {
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DISP_LAYER_2D = 0,
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DISP_LAYER_3D_SBS_0 = 0x1,
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DISP_LAYER_3D_SBS_90 = 0x2,
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DISP_LAYER_3D_SBS_180 = 0x3,
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DISP_LAYER_3D_SBS_270 = 0x4,
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DISP_LAYER_3D_TAB_0 = 0x10,
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DISP_LAYER_3D_TAB_90 = 0x20,
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DISP_LAYER_3D_TAB_180 = 0x30,
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DISP_LAYER_3D_TAB_270 = 0x40,
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};
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enum DISP_BUFFER_TYPE {
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/* normal memory */
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DISP_NORMAL_BUFFER = 0,
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/* normal memory but should not be dumpped within screenshot */
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DISP_PROTECT_BUFFER = 1,
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/* secure memory */
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DISP_SECURE_BUFFER = 2,
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DISP_SECURE_BUFFER_SHIFT = 0x10002
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};
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enum DISP_BUFFER_SOURCE {
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/* ion buffer */
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DISP_BUFFER_ION = 0,
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/* dim layer, const alpha */
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DISP_BUFFER_ALPHA = 1,
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/* mva buffer */
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DISP_BUFFER_MVA = 2,
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};
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enum DISP_ALPHA_TYPE {
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DISP_ALPHA_ONE = 0,
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DISP_ALPHA_SRC = 1,
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DISP_ALPHA_SRC_INVERT = 2,
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DISP_ALPHA_INVALID = 3,
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};
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enum DISP_SESSION_TYPE {
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DISP_SESSION_PRIMARY = 1,
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DISP_SESSION_EXTERNAL = 2,
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DISP_SESSION_MEMORY = 3
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};
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enum DISP_YUV_RANGE_ENUM {
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DISP_YUV_BT601_FULL = 0,
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DISP_YUV_BT601 = 1,
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DISP_YUV_BT709 = 2
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};
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enum DISP_MODE {
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DISP_INVALID_SESSION_MODE = 0,
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/* single output */
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DISP_SESSION_DIRECT_LINK_MODE = 1,
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DISP_SESSION_DECOUPLE_MODE = 2,
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/* two ouputs */
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DISP_SESSION_DIRECT_LINK_MIRROR_MODE = 3,
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DISP_SESSION_DECOUPLE_MIRROR_MODE = 4,
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DISP_SESSION_RDMA_MODE,
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DISP_SESSION_DUAL_DIRECT_LINK_MODE,
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DISP_SESSION_DUAL_DECOUPLE_MODE,
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DISP_SESSION_DUAL_RDMA_MODE,
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/* three session at same time */
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DISP_SESSION_TRIPLE_DIRECT_LINK_MODE,
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DISP_SESSION_MODE_NUM,
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};
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enum DISP_SESSION_USER {
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SESSION_USER_INVALID = -1,
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SESSION_USER_HWC = 0,
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SESSION_USER_GUIEXT = 1,
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SESSION_USER_AEE = 2,
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SESSION_USER_PANDISP = 3,
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SESSION_USER_CNT,
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};
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enum DISP_DC_TYPE {
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DISP_OUTPUT_UNKNOWN = 0,
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DISP_OUTPUT_MEMORY = 1,
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DISP_OUTPUT_DECOUPLE = 2,
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};
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enum EXTD_TRIGGER_MODE {
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TRIGGER_NORMAL = 0,
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TRIGGER_SUSPEND = 1,
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TRIGGER_RESUME = 2,
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TRIGGER_MODE_MAX_NUM,
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};
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struct disp_session_config {
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enum DISP_SESSION_TYPE type;
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unsigned int device_id;
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enum DISP_MODE mode;
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unsigned int session_id;
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enum DISP_SESSION_USER user;
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unsigned int present_fence_idx;
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enum DISP_DC_TYPE dc_type;
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int need_merge;
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enum EXTD_TRIGGER_MODE tigger_mode;
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};
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struct disp_session_vsync_config {
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unsigned int session_id;
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unsigned int vsync_cnt;
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unsigned long long vsync_ts;
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int lcm_fps;
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};
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struct layer_dirty_roi {
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__u16 dirty_x;
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__u16 dirty_y;
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__u16 dirty_w;
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__u16 dirty_h;
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};
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struct disp_input_config {
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void *src_base_addr;
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void *src_phy_addr;
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enum DISP_BUFFER_SOURCE buffer_source;
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enum DISP_BUFFER_TYPE security;
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enum DISP_FORMAT src_fmt;
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enum DISP_ALPHA_TYPE src_alpha;
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enum DISP_ALPHA_TYPE dst_alpha;
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enum DISP_YUV_RANGE_ENUM yuv_range;
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int dataspace;
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enum DISP_ORIENTATION layer_rotation;
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enum DISP_LAYER_TYPE layer_type;
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enum DISP_ORIENTATION video_rotation;
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__u32 next_buff_idx;
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/* fence to be waited before using this buffer. -1 if invalid */
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int src_fence_fd;
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/* fence struct of src_fence_fd, used in kernel */
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void *src_fence_struct;
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__u32 src_color_key;
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__u32 frm_sequence;
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__u32 dim_color;
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void *dirty_roi_addr;
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__u16 dirty_roi_num;
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__u16 src_v_pitch;
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__u16 src_pitch;
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__u16 src_offset_x, src_offset_y;
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__u16 src_width, src_height;
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__u16 tgt_offset_x, tgt_offset_y;
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__u16 tgt_width, tgt_height;
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__u8 alpha_enable;
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__u8 alpha;
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__u8 sur_aen;
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__u8 src_use_color_key;
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__u8 layer_id;
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__u8 layer_enable;
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__u8 src_direct_link;
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__u8 isTdshp;
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__u8 identity;
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__u8 connected_type;
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__s8 ext_sel_layer;
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__u8 compress;
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};
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struct disp_output_config {
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void *va;
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void *pa;
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enum DISP_FORMAT fmt;
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unsigned int x;
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unsigned int y;
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unsigned int width;
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unsigned int height;
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unsigned int pitch;
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unsigned int pitchUV;
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enum DISP_BUFFER_TYPE security;
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unsigned int buff_idx;
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unsigned int interface_idx;
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/* fence to be waited before using this buffer. -1 if invalid */
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int src_fence_fd;
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/* fence struct of src_fence_fd, used in kernel */
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void *src_fence_struct;
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unsigned int frm_sequence;
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};
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struct disp_ccorr_config {
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bool is_dirty;
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int mode;
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int color_matrix[16];
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bool featureFlag;
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};
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struct disp_session_input_config {
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enum DISP_SESSION_USER setter;
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unsigned int session_id;
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unsigned int config_layer_num;
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struct disp_input_config config[12];
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struct disp_ccorr_config ccorr_config;
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};
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struct disp_session_output_config {
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unsigned int session_id;
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struct disp_output_config config;
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};
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struct disp_session_layer_num_config {
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unsigned int session_id;
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unsigned int max_layer_num;
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};
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struct disp_frame_cfg_t {
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enum DISP_SESSION_USER setter;
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unsigned int session_id;
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/* input config */
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unsigned int input_layer_num;
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struct disp_input_config input_cfg[12];
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unsigned int overlap_layer_num;
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/* constant layer */
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unsigned int const_layer_num;
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struct disp_input_config const_layer[1];
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/* output config */
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int output_en;
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struct disp_output_config output_cfg;
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/* trigger config */
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enum DISP_MODE mode;
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unsigned int present_fence_idx;
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int prev_present_fence_fd;
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void *prev_present_fence_struct;
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enum EXTD_TRIGGER_MODE tigger_mode;
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enum DISP_SESSION_USER user;
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/* ccorr config */
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struct disp_ccorr_config ccorr_config;
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/* res_idx: SF/HWC selects which resolution to use */
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int res_idx;
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unsigned int hrt_weight;
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unsigned int hrt_idx;
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/* for panel HBM (High Backlight Mode) control */
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bool hbm_en;
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/*DynFPS*/
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int active_config;
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};
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struct disp_session_info {
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unsigned int session_id;
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unsigned int maxLayerNum;
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unsigned int isHwVsyncAvailable;
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enum DISP_IF_TYPE displayType;
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unsigned int displayWidth;
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unsigned int displayHeight;
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unsigned int displayFormat;
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enum DISP_IF_MODE displayMode;
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unsigned int vsyncFPS;
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unsigned int physicalWidth;
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unsigned int physicalHeight;
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/* length: um, for more precise precision */
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unsigned int physicalWidthUm;
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/* length: um, for more precise precision */
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unsigned int physicalHeightUm;
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unsigned int density;
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unsigned int isConnected;
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unsigned int isHDCPSupported;
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unsigned int isOVLDisabled;
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unsigned int is3DSupport;
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unsigned int const_layer_num;
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/* updateFPS: fps of HWC trigger display */
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/* notes: for better Accuracy, updateFPS = real_fps*100 */
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unsigned int updateFPS;
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unsigned int is_updateFPS_stable;
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};
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struct disp_buffer_info {
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/* Session */
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unsigned int session_id;
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/* Input */
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unsigned int layer_id;
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unsigned int layer_en;
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int ion_fd;
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unsigned int cache_sync;
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/* Output */
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unsigned int index;
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int fence_fd;
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unsigned int interface_index;
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int interface_fence_fd;
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};
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struct disp_present_fence {
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/* input */
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unsigned int session_id;
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/* output */
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int present_fence_fd;
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unsigned int present_fence_index;
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};
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struct disp_present_fence_info {
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/* Session */
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unsigned int session_id;
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/* Output */
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unsigned int index;
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int fence_fd;
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};
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enum DISP_CAP_OUTPUT_MODE {
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DISP_OUTPUT_CAP_DIRECT_LINK = 0,
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DISP_OUTPUT_CAP_DECOUPLE,
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DISP_OUTPUT_CAP_SWITCHABLE,
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};
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enum DISP_CAP_OUTPUT_PASS {
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DISP_OUTPUT_CAP_SINGLE_PASS = 0,
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DISP_OUTPUT_CAP_MULTI_PASS,
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};
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enum DISP_FEATURE {
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DISP_FEATURE_TIME_SHARING = 0x00000001,
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DISP_FEATURE_HRT = 0x00000002,
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DISP_FEATURE_PARTIAL = 0x00000004,
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DISP_FEATURE_FENCE_WAIT = 0x00000008,
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DISP_FEATURE_RSZ = 0x00000010,
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DISP_FEATURE_NO_PARGB = 0x00000020,
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DISP_FEATURE_DISP_SELF_REFRESH = 0x00000040,
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DISP_FEATURE_RPO = 0x00000080,
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DISP_FEATURE_FBDC = 0x00000100,
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DISP_FEATURE_FORCE_DISABLE_AOD = 0x00000200,
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DISP_FEATURE_ARR = 0x00000400,
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DISP_FEATURE_DYNFPS = 0x00000800
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};
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struct disp_caps_info {
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enum DISP_CAP_OUTPUT_MODE output_mode;
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enum DISP_CAP_OUTPUT_PASS output_pass;
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unsigned int max_layer_num;
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unsigned int disp_feature;
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int is_support_frame_cfg_ioctl;
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int is_output_rotated;
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int lcm_degree;
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/*
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* resizer input resolution list
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* format:
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* sequence from big resolution(LCM resolution) to small
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* portrait {width, height, rsz layer cnt to use}
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* ex:
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* { 1440, 2560, 0},
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* { 1080, 1920, 1},
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* ...
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*/
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unsigned int rsz_in_res_list[RSZ_RES_LIST_NUM][3];
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unsigned int rsz_list_length;
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/* portrait { width, height } */
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unsigned int rsz_in_max[2];
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/* is_support_three_session:
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* 1: support three session at same time
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* 0: not support three session at same time
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*/
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int is_support_three_session;
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int lcm_color_mode;
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unsigned int max_luminance;
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unsigned int average_luminance;
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unsigned int min_luminance;
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};
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struct disp_session_buf_info {
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unsigned int session_id;
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unsigned int buf_hnd[3];
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};
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enum LAYERING_CAPS {
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LAYERING_OVL_ONLY = 0x00000001,
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MDP_RSZ_LAYER = 0x00000002,
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DISP_RSZ_LAYER = 0x00000004,
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MDP_ROT_LAYER = 0x00000008,
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MDP_HDR_LAYER = 0x00000010,
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NO_FBDC = 0x00000020,
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CLIENT_CLEAR_LAYER = 0x00000040,
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DISP_CLIENT_CLEAR_LAYER = 0x00000080,
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};
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struct layer_config {
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unsigned int ovl_id;
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enum DISP_FORMAT src_fmt;
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int dataspace;
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unsigned int dst_offset_x, dst_offset_y;
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unsigned int dst_width, dst_height;
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int ext_sel_layer;
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unsigned int src_offset_x, src_offset_y;
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unsigned int src_width, src_height;
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unsigned int layer_caps;
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unsigned int clip; /* drv internal use */
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__u8 compress;
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};
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struct disp_layer_info {
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struct layer_config *input_config[2];
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int disp_mode[2];
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int layer_num[2];
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int gles_head[2];
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int gles_tail[2];
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int hrt_num;
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/* res_idx: SF/HWC selects which resolution to use */
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int res_idx;
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unsigned int hrt_weight;
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unsigned int hrt_idx;
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/*DynFPS*/
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int active_config_id[2];
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};
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enum DISP_SCENARIO {
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DISP_SCENARIO_NORMAL,
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DISP_SCENARIO_SELF_REFRESH,
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DISP_SCENARIO_FORCE_DC,
|
|
DISP_SCENARIO_NUM,
|
|
};
|
|
struct disp_scenario_config_t {
|
|
unsigned int session_id;
|
|
unsigned int scenario;
|
|
};
|
|
|
|
enum DISP_UT_ERROR {
|
|
DISP_UT_ERROR_OVL = 0x00000001,
|
|
DISP_UT_ERROR_WDMA = 0x00000002,
|
|
DISP_UT_ERROR_RDMA = 0x00000004,
|
|
DISP_UT_ERROR_CMDQ_TIMEOUT = 0x00000008,
|
|
};
|
|
|
|
enum DISP_SELF_REFRESH_TYPE {
|
|
WAIT_FOR_REFRESH,
|
|
REFRESH_FOR_ANTI_LATENCY2,
|
|
REFRESH_FOR_SWITCH_DECOUPLE,
|
|
REFRESH_FOR_SWITCH_DECOUPLE_MIRROR,
|
|
REFRESH_FOR_IDLE,
|
|
REFRESH_TYPE_NUM,
|
|
};
|
|
struct dynamic_fps_levels {
|
|
unsigned int fps_level_num;
|
|
unsigned int fps_levels[10];
|
|
};
|
|
|
|
/*DynFPS start*/
|
|
#define MULTI_CONFIG_NUM 2
|
|
struct dyn_config_info {
|
|
unsigned int vsyncFPS;
|
|
unsigned int vact_timing_fps;/*active timing fps*/
|
|
unsigned int width;
|
|
unsigned int height;
|
|
};
|
|
|
|
/*only primary_display support*/
|
|
struct multi_configs {
|
|
unsigned int config_num;
|
|
struct dyn_config_info dyn_cfgs[MULTI_CONFIG_NUM];
|
|
};
|
|
/*DynFPS end*/
|
|
|
|
/* IOCTL commands. */
|
|
#define DISP_IOW(num, dtype) _IOW('O', num, dtype)
|
|
#define DISP_IOR(num, dtype) _IOR('O', num, dtype)
|
|
#define DISP_IOWR(num, dtype) _IOWR('O', num, dtype)
|
|
#define DISP_IO(num) _IO('O', num)
|
|
|
|
|
|
#define DISP_IOCTL_CREATE_SESSION \
|
|
DISP_IOW(201, struct disp_session_config)
|
|
#define DISP_IOCTL_DESTROY_SESSION \
|
|
DISP_IOW(202, struct disp_session_config)
|
|
#define DISP_IOCTL_TRIGGER_SESSION \
|
|
DISP_IOW(203, struct disp_session_config)
|
|
#define DISP_IOCTL_PREPARE_INPUT_BUFFER \
|
|
DISP_IOW(204, struct disp_buffer_info)
|
|
#define DISP_IOCTL_PREPARE_OUTPUT_BUFFER \
|
|
DISP_IOW(205, struct disp_buffer_info)
|
|
#define DISP_IOCTL_SET_INPUT_BUFFER \
|
|
DISP_IOW(206, struct disp_session_input_config)
|
|
#define DISP_IOCTL_SET_OUTPUT_BUFFER \
|
|
DISP_IOW(207, struct disp_session_output_config)
|
|
#define DISP_IOCTL_GET_SESSION_INFO \
|
|
DISP_IOW(208, struct disp_session_info)
|
|
|
|
|
|
#define DISP_IOCTL_SET_SESSION_MODE \
|
|
DISP_IOW(209, struct disp_session_config)
|
|
#define DISP_IOCTL_GET_SESSION_MODE \
|
|
DISP_IOW(210, struct disp_session_config)
|
|
#define DISP_IOCTL_SET_SESSION_TYPE \
|
|
DISP_IOW(211, struct disp_session_config)
|
|
#define DISP_IOCTL_GET_SESSION_TYPE \
|
|
DISP_IOW(212, struct disp_session_config)
|
|
#define DISP_IOCTL_WAIT_FOR_VSYNC \
|
|
DISP_IOW(213, struct disp_session_vsync_config)
|
|
#define DISP_IOCTL_SET_MAX_LAYER_NUM \
|
|
DISP_IOW(214, struct disp_session_layer_num_config)
|
|
#define DISP_IOCTL_GET_VSYNC_FPS \
|
|
DISP_IOW(215, unsigned int)
|
|
#define DISP_IOCTL_SET_VSYNC_FPS \
|
|
DISP_IOW(216, unsigned int)
|
|
#define DISP_IOCTL_GET_PRESENT_FENCE \
|
|
DISP_IOW(217, struct disp_present_fence)
|
|
|
|
#define DISP_IOCTL_GET_IS_DRIVER_SUSPEND \
|
|
DISP_IOW(218, unsigned int)
|
|
#define DISP_IOCTL_GET_DISPLAY_CAPS \
|
|
DISP_IOW(219, struct disp_caps_info)
|
|
#define DISP_IOCTL_INSERT_SESSION_BUFFERS \
|
|
DISP_IOW(220, struct disp_session_buf_info)
|
|
#define DISP_IOCTL_FRAME_CONFIG \
|
|
DISP_IOW(221, struct disp_session_output_config)
|
|
#define DISP_IOCTL_QUERY_VALID_LAYER \
|
|
DISP_IOW(222, struct disp_layer_info)
|
|
#define DISP_IOCTL_SET_SCENARIO \
|
|
DISP_IOW(223, struct disp_scenario_config_t)
|
|
#define DISP_IOCTL_WAIT_ALL_JOBS_DONE \
|
|
DISP_IOW(224, unsigned int)
|
|
#define DISP_IOCTL_SCREEN_FREEZE \
|
|
DISP_IOW(225, unsigned int)
|
|
#define DISP_IOCTL_GET_UT_RESULT \
|
|
DISP_IOW(226, unsigned int)
|
|
#define DISP_IOCTL_WAIT_DISP_SELF_REFRESH \
|
|
DISP_IOW(227, unsigned int)
|
|
#define DISP_IOCTL_WAIT_FPS_CHANGE \
|
|
DISP_IOW(228, unsigned int)
|
|
#define DISP_IOCTL_TOUCH_HINT \
|
|
DISP_IOW(229, unsigned int)
|
|
#define DISP_IOCTL_GET_SUPPORTED_FPS \
|
|
DISP_IOW(230, unsigned int)
|
|
#define DISP_IOCTL_GET_MULTI_CONFIGS \
|
|
DISP_IOR(231, struct multi_configs)
|
|
#ifdef __KERNEL__
|
|
|
|
int disp_mgr_get_session_info(struct disp_session_info *info);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* __DISP_SESSION_H */
|