641 lines
19 KiB
C
Executable file
641 lines
19 KiB
C
Executable file
/*
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* AMD 10Gb Ethernet driver
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*
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* This file is available to you under your choice of the following two
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* licenses:
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*
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* License 1: GPLv2
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*
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* Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
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*
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* This file is free software; you may copy, redistribute and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or (at
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* your option) any later version.
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*
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* This file is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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* The Synopsys DWC ETHER XGMAC Software Driver and documentation
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* (hereinafter "Software") is an unsupported proprietary work of Synopsys,
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* Inc. unless otherwise expressly agreed to in writing between Synopsys
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* and you.
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*
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* The Software IS NOT an item of Licensed Software or Licensed Product
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* under any End User Software License Agreement or Agreement for Licensed
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* Product with Synopsys or any supplement thereto. Permission is hereby
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* granted, free of charge, to any person obtaining a copy of this software
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* annotated with this license and the Software, to deal in the Software
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* without restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is furnished
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* to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
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* BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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*
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* License 2: Modified BSD
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*
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* Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Advanced Micro Devices, Inc. nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* This file incorporates work covered by the following copyright and
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* permission notice:
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* The Synopsys DWC ETHER XGMAC Software Driver and documentation
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* (hereinafter "Software") is an unsupported proprietary work of Synopsys,
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* Inc. unless otherwise expressly agreed to in writing between Synopsys
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* and you.
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*
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* The Software IS NOT an item of Licensed Software or Licensed Product
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* under any End User Software License Agreement or Agreement for Licensed
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* Product with Synopsys or any supplement thereto. Permission is hereby
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* granted, free of charge, to any person obtaining a copy of this software
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* annotated with this license and the Software, to deal in the Software
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* without restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is furnished
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* to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
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* BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/spinlock.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_net.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/of_device.h>
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#include <linux/clk.h>
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#include <linux/property.h>
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#include <linux/acpi.h>
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#include <linux/mdio.h>
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#include "xgbe.h"
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#include "xgbe-common.h"
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#ifdef CONFIG_ACPI
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static const struct acpi_device_id xgbe_acpi_match[];
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static struct xgbe_version_data *xgbe_acpi_vdata(struct xgbe_prv_data *pdata)
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{
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const struct acpi_device_id *id;
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id = acpi_match_device(xgbe_acpi_match, pdata->dev);
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return id ? (struct xgbe_version_data *)id->driver_data : NULL;
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}
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static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
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{
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struct device *dev = pdata->dev;
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u32 property;
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int ret;
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/* Obtain the system clock setting */
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ret = device_property_read_u32(dev, XGBE_ACPI_DMA_FREQ, &property);
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if (ret) {
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dev_err(dev, "unable to obtain %s property\n",
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XGBE_ACPI_DMA_FREQ);
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return ret;
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}
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pdata->sysclk_rate = property;
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/* Obtain the PTP clock setting */
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ret = device_property_read_u32(dev, XGBE_ACPI_PTP_FREQ, &property);
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if (ret) {
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dev_err(dev, "unable to obtain %s property\n",
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XGBE_ACPI_PTP_FREQ);
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return ret;
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}
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pdata->ptpclk_rate = property;
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return 0;
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}
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#else /* CONFIG_ACPI */
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static struct xgbe_version_data *xgbe_acpi_vdata(struct xgbe_prv_data *pdata)
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{
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return NULL;
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}
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static int xgbe_acpi_support(struct xgbe_prv_data *pdata)
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{
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return -EINVAL;
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}
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#endif /* CONFIG_ACPI */
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#ifdef CONFIG_OF
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static const struct of_device_id xgbe_of_match[];
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static struct xgbe_version_data *xgbe_of_vdata(struct xgbe_prv_data *pdata)
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{
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const struct of_device_id *id;
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id = of_match_device(xgbe_of_match, pdata->dev);
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return id ? (struct xgbe_version_data *)id->data : NULL;
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}
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static int xgbe_of_support(struct xgbe_prv_data *pdata)
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{
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struct device *dev = pdata->dev;
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/* Obtain the system clock setting */
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pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
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if (IS_ERR(pdata->sysclk)) {
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dev_err(dev, "dma devm_clk_get failed\n");
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return PTR_ERR(pdata->sysclk);
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}
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pdata->sysclk_rate = clk_get_rate(pdata->sysclk);
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/* Obtain the PTP clock setting */
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pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
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if (IS_ERR(pdata->ptpclk)) {
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dev_err(dev, "ptp devm_clk_get failed\n");
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return PTR_ERR(pdata->ptpclk);
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}
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pdata->ptpclk_rate = clk_get_rate(pdata->ptpclk);
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return 0;
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}
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static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata)
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{
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struct device *dev = pdata->dev;
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struct device_node *phy_node;
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struct platform_device *phy_pdev;
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phy_node = of_parse_phandle(dev->of_node, "phy-handle", 0);
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if (phy_node) {
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/* Old style device tree:
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* The XGBE and PHY resources are separate
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*/
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phy_pdev = of_find_device_by_node(phy_node);
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of_node_put(phy_node);
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} else {
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/* New style device tree:
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* The XGBE and PHY resources are grouped together with
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* the PHY resources listed last
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*/
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get_device(dev);
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phy_pdev = pdata->platdev;
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}
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return phy_pdev;
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}
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#else /* CONFIG_OF */
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static struct xgbe_version_data *xgbe_of_vdata(struct xgbe_prv_data *pdata)
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{
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return NULL;
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}
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static int xgbe_of_support(struct xgbe_prv_data *pdata)
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{
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return -EINVAL;
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}
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static struct platform_device *xgbe_of_get_phy_pdev(struct xgbe_prv_data *pdata)
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{
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return NULL;
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}
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#endif /* CONFIG_OF */
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static unsigned int xgbe_resource_count(struct platform_device *pdev,
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unsigned int type)
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{
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unsigned int count;
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int i;
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for (i = 0, count = 0; i < pdev->num_resources; i++) {
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struct resource *res = &pdev->resource[i];
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if (type == resource_type(res))
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count++;
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}
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return count;
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}
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static struct platform_device *xgbe_get_phy_pdev(struct xgbe_prv_data *pdata)
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{
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struct platform_device *phy_pdev;
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if (pdata->use_acpi) {
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get_device(pdata->dev);
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phy_pdev = pdata->platdev;
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} else {
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phy_pdev = xgbe_of_get_phy_pdev(pdata);
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}
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return phy_pdev;
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}
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static struct xgbe_version_data *xgbe_get_vdata(struct xgbe_prv_data *pdata)
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{
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return pdata->use_acpi ? xgbe_acpi_vdata(pdata)
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: xgbe_of_vdata(pdata);
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}
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static int xgbe_platform_probe(struct platform_device *pdev)
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{
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struct xgbe_prv_data *pdata;
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struct device *dev = &pdev->dev;
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struct platform_device *phy_pdev;
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struct resource *res;
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const char *phy_mode;
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unsigned int phy_memnum, phy_irqnum;
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unsigned int dma_irqnum, dma_irqend;
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enum dev_dma_attr attr;
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int ret;
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pdata = xgbe_alloc_pdata(dev);
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if (IS_ERR(pdata)) {
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ret = PTR_ERR(pdata);
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goto err_alloc;
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}
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pdata->platdev = pdev;
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pdata->adev = ACPI_COMPANION(dev);
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platform_set_drvdata(pdev, pdata);
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/* Check if we should use ACPI or DT */
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pdata->use_acpi = dev->of_node ? 0 : 1;
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/* Get the version data */
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pdata->vdata = xgbe_get_vdata(pdata);
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phy_pdev = xgbe_get_phy_pdev(pdata);
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if (!phy_pdev) {
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dev_err(dev, "unable to obtain phy device\n");
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ret = -EINVAL;
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goto err_phydev;
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}
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pdata->phy_platdev = phy_pdev;
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pdata->phy_dev = &phy_pdev->dev;
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if (pdev == phy_pdev) {
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/* New style device tree or ACPI:
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* The XGBE and PHY resources are grouped together with
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* the PHY resources listed last
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*/
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phy_memnum = xgbe_resource_count(pdev, IORESOURCE_MEM) - 3;
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phy_irqnum = xgbe_resource_count(pdev, IORESOURCE_IRQ) - 1;
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dma_irqnum = 1;
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dma_irqend = phy_irqnum;
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} else {
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/* Old style device tree:
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* The XGBE and PHY resources are separate
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*/
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phy_memnum = 0;
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phy_irqnum = 0;
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dma_irqnum = 1;
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dma_irqend = xgbe_resource_count(pdev, IORESOURCE_IRQ);
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}
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/* Obtain the mmio areas for the device */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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pdata->xgmac_regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(pdata->xgmac_regs)) {
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dev_err(dev, "xgmac ioremap failed\n");
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ret = PTR_ERR(pdata->xgmac_regs);
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goto err_io;
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}
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if (netif_msg_probe(pdata))
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dev_dbg(dev, "xgmac_regs = %p\n", pdata->xgmac_regs);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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pdata->xpcs_regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(pdata->xpcs_regs)) {
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dev_err(dev, "xpcs ioremap failed\n");
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ret = PTR_ERR(pdata->xpcs_regs);
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goto err_io;
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}
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if (netif_msg_probe(pdata))
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dev_dbg(dev, "xpcs_regs = %p\n", pdata->xpcs_regs);
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res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);
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pdata->rxtx_regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(pdata->rxtx_regs)) {
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dev_err(dev, "rxtx ioremap failed\n");
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ret = PTR_ERR(pdata->rxtx_regs);
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goto err_io;
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}
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if (netif_msg_probe(pdata))
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dev_dbg(dev, "rxtx_regs = %p\n", pdata->rxtx_regs);
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res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);
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pdata->sir0_regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(pdata->sir0_regs)) {
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dev_err(dev, "sir0 ioremap failed\n");
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ret = PTR_ERR(pdata->sir0_regs);
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goto err_io;
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}
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if (netif_msg_probe(pdata))
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dev_dbg(dev, "sir0_regs = %p\n", pdata->sir0_regs);
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res = platform_get_resource(phy_pdev, IORESOURCE_MEM, phy_memnum++);
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pdata->sir1_regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(pdata->sir1_regs)) {
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dev_err(dev, "sir1 ioremap failed\n");
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ret = PTR_ERR(pdata->sir1_regs);
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goto err_io;
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}
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if (netif_msg_probe(pdata))
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dev_dbg(dev, "sir1_regs = %p\n", pdata->sir1_regs);
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/* Retrieve the MAC address */
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ret = device_property_read_u8_array(dev, XGBE_MAC_ADDR_PROPERTY,
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pdata->mac_addr,
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sizeof(pdata->mac_addr));
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if (ret || !is_valid_ether_addr(pdata->mac_addr)) {
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dev_err(dev, "invalid %s property\n", XGBE_MAC_ADDR_PROPERTY);
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if (!ret)
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ret = -EINVAL;
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goto err_io;
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}
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/* Retrieve the PHY mode - it must be "xgmii" */
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ret = device_property_read_string(dev, XGBE_PHY_MODE_PROPERTY,
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&phy_mode);
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if (ret || strcmp(phy_mode, phy_modes(PHY_INTERFACE_MODE_XGMII))) {
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dev_err(dev, "invalid %s property\n", XGBE_PHY_MODE_PROPERTY);
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if (!ret)
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ret = -EINVAL;
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goto err_io;
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}
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pdata->phy_mode = PHY_INTERFACE_MODE_XGMII;
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/* Check for per channel interrupt support */
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if (device_property_present(dev, XGBE_DMA_IRQS_PROPERTY)) {
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pdata->per_channel_irq = 1;
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pdata->channel_irq_mode = XGBE_IRQ_MODE_EDGE;
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}
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/* Obtain device settings unique to ACPI/OF */
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if (pdata->use_acpi)
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ret = xgbe_acpi_support(pdata);
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else
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ret = xgbe_of_support(pdata);
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if (ret)
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goto err_io;
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/* Set the DMA coherency values */
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attr = device_get_dma_attr(dev);
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if (attr == DEV_DMA_NOT_SUPPORTED) {
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dev_err(dev, "DMA is not supported");
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ret = -ENODEV;
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goto err_io;
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}
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pdata->coherent = (attr == DEV_DMA_COHERENT);
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if (pdata->coherent) {
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pdata->arcr = XGBE_DMA_OS_ARCR;
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pdata->awcr = XGBE_DMA_OS_AWCR;
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} else {
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pdata->arcr = XGBE_DMA_SYS_ARCR;
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pdata->awcr = XGBE_DMA_SYS_AWCR;
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}
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/* Set the maximum fifo amounts */
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pdata->tx_max_fifo_size = pdata->vdata->tx_max_fifo_size;
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pdata->rx_max_fifo_size = pdata->vdata->rx_max_fifo_size;
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|
|
/* Set the hardware channel and queue counts */
|
|
xgbe_set_counts(pdata);
|
|
|
|
/* Always have XGMAC and XPCS (auto-negotiation) interrupts */
|
|
pdata->irq_count = 2;
|
|
|
|
/* Get the device interrupt */
|
|
ret = platform_get_irq(pdev, 0);
|
|
if (ret < 0) {
|
|
dev_err(dev, "platform_get_irq 0 failed\n");
|
|
goto err_io;
|
|
}
|
|
pdata->dev_irq = ret;
|
|
|
|
/* Get the per channel DMA interrupts */
|
|
if (pdata->per_channel_irq) {
|
|
unsigned int i, max = ARRAY_SIZE(pdata->channel_irq);
|
|
|
|
for (i = 0; (i < max) && (dma_irqnum < dma_irqend); i++) {
|
|
ret = platform_get_irq(pdata->platdev, dma_irqnum++);
|
|
if (ret < 0) {
|
|
netdev_err(pdata->netdev,
|
|
"platform_get_irq %u failed\n",
|
|
dma_irqnum - 1);
|
|
goto err_io;
|
|
}
|
|
|
|
pdata->channel_irq[i] = ret;
|
|
}
|
|
|
|
pdata->channel_irq_count = max;
|
|
|
|
pdata->irq_count += max;
|
|
}
|
|
|
|
/* Get the auto-negotiation interrupt */
|
|
ret = platform_get_irq(phy_pdev, phy_irqnum++);
|
|
if (ret < 0) {
|
|
dev_err(dev, "platform_get_irq phy 0 failed\n");
|
|
goto err_io;
|
|
}
|
|
pdata->an_irq = ret;
|
|
|
|
/* Configure the netdev resource */
|
|
ret = xgbe_config_netdev(pdata);
|
|
if (ret)
|
|
goto err_io;
|
|
|
|
netdev_notice(pdata->netdev, "net device enabled\n");
|
|
|
|
return 0;
|
|
|
|
err_io:
|
|
platform_device_put(phy_pdev);
|
|
|
|
err_phydev:
|
|
xgbe_free_pdata(pdata);
|
|
|
|
err_alloc:
|
|
dev_notice(dev, "net device not enabled\n");
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int xgbe_platform_remove(struct platform_device *pdev)
|
|
{
|
|
struct xgbe_prv_data *pdata = platform_get_drvdata(pdev);
|
|
|
|
xgbe_deconfig_netdev(pdata);
|
|
|
|
platform_device_put(pdata->phy_platdev);
|
|
|
|
xgbe_free_pdata(pdata);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int xgbe_platform_suspend(struct device *dev)
|
|
{
|
|
struct xgbe_prv_data *pdata = dev_get_drvdata(dev);
|
|
struct net_device *netdev = pdata->netdev;
|
|
int ret = 0;
|
|
|
|
DBGPR("-->xgbe_suspend\n");
|
|
|
|
if (netif_running(netdev))
|
|
ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);
|
|
|
|
pdata->lpm_ctrl = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_CTRL1);
|
|
pdata->lpm_ctrl |= MDIO_CTRL1_LPOWER;
|
|
XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl);
|
|
|
|
DBGPR("<--xgbe_suspend\n");
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int xgbe_platform_resume(struct device *dev)
|
|
{
|
|
struct xgbe_prv_data *pdata = dev_get_drvdata(dev);
|
|
struct net_device *netdev = pdata->netdev;
|
|
int ret = 0;
|
|
|
|
DBGPR("-->xgbe_resume\n");
|
|
|
|
pdata->lpm_ctrl &= ~MDIO_CTRL1_LPOWER;
|
|
XMDIO_WRITE(pdata, MDIO_MMD_PCS, MDIO_CTRL1, pdata->lpm_ctrl);
|
|
|
|
if (netif_running(netdev)) {
|
|
ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);
|
|
|
|
/* Schedule a restart in case the link or phy state changed
|
|
* while we were powered down.
|
|
*/
|
|
schedule_work(&pdata->restart_work);
|
|
}
|
|
|
|
DBGPR("<--xgbe_resume\n");
|
|
|
|
return ret;
|
|
}
|
|
#endif /* CONFIG_PM_SLEEP */
|
|
|
|
static const struct xgbe_version_data xgbe_v1 = {
|
|
.init_function_ptrs_phy_impl = xgbe_init_function_ptrs_phy_v1,
|
|
.xpcs_access = XGBE_XPCS_ACCESS_V1,
|
|
.tx_max_fifo_size = 81920,
|
|
.rx_max_fifo_size = 81920,
|
|
.tx_tstamp_workaround = 1,
|
|
};
|
|
|
|
#ifdef CONFIG_ACPI
|
|
static const struct acpi_device_id xgbe_acpi_match[] = {
|
|
{ .id = "AMDI8001",
|
|
.driver_data = (kernel_ulong_t)&xgbe_v1 },
|
|
{},
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(acpi, xgbe_acpi_match);
|
|
#endif
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id xgbe_of_match[] = {
|
|
{ .compatible = "amd,xgbe-seattle-v1a",
|
|
.data = &xgbe_v1 },
|
|
{},
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, xgbe_of_match);
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(xgbe_platform_pm_ops,
|
|
xgbe_platform_suspend, xgbe_platform_resume);
|
|
|
|
static struct platform_driver xgbe_driver = {
|
|
.driver = {
|
|
.name = XGBE_DRV_NAME,
|
|
#ifdef CONFIG_ACPI
|
|
.acpi_match_table = xgbe_acpi_match,
|
|
#endif
|
|
#ifdef CONFIG_OF
|
|
.of_match_table = xgbe_of_match,
|
|
#endif
|
|
.pm = &xgbe_platform_pm_ops,
|
|
},
|
|
.probe = xgbe_platform_probe,
|
|
.remove = xgbe_platform_remove,
|
|
};
|
|
|
|
int xgbe_platform_init(void)
|
|
{
|
|
return platform_driver_register(&xgbe_driver);
|
|
}
|
|
|
|
void xgbe_platform_exit(void)
|
|
{
|
|
platform_driver_unregister(&xgbe_driver);
|
|
}
|