c05564c4d8
Android 13
386 lines
8.5 KiB
C
Executable file
386 lines
8.5 KiB
C
Executable file
/*
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* aQuantia Corporation Network Driver
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* Copyright (C) 2014-2017 aQuantia Corporation. All rights reserved
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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/* File aq_vec.c: Definition of common structure for vector of Rx and Tx rings.
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* Definition of functions for Rx and Tx rings. Friendly module for aq_nic.
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*/
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#include "aq_vec.h"
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#include "aq_nic.h"
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#include "aq_ring.h"
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#include "aq_hw.h"
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#include <linux/netdevice.h>
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struct aq_vec_s {
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const struct aq_hw_ops *aq_hw_ops;
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struct aq_hw_s *aq_hw;
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struct aq_nic_s *aq_nic;
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unsigned int tx_rings;
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unsigned int rx_rings;
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struct aq_ring_param_s aq_ring_param;
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struct napi_struct napi;
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struct aq_ring_s ring[AQ_CFG_TCS_MAX][2];
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};
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#define AQ_VEC_TX_ID 0
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#define AQ_VEC_RX_ID 1
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static int aq_vec_poll(struct napi_struct *napi, int budget)
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{
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struct aq_vec_s *self = container_of(napi, struct aq_vec_s, napi);
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unsigned int sw_tail_old = 0U;
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struct aq_ring_s *ring = NULL;
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bool was_tx_cleaned = true;
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unsigned int i = 0U;
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int work_done = 0;
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int err = 0;
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if (!self) {
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err = -EINVAL;
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} else {
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for (i = 0U, ring = self->ring[0];
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self->tx_rings > i; ++i, ring = self->ring[i]) {
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if (self->aq_hw_ops->hw_ring_tx_head_update) {
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err = self->aq_hw_ops->hw_ring_tx_head_update(
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self->aq_hw,
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&ring[AQ_VEC_TX_ID]);
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if (err < 0)
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goto err_exit;
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}
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if (ring[AQ_VEC_TX_ID].sw_head !=
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ring[AQ_VEC_TX_ID].hw_head) {
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was_tx_cleaned = aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]);
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aq_ring_update_queue_state(&ring[AQ_VEC_TX_ID]);
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}
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err = self->aq_hw_ops->hw_ring_rx_receive(self->aq_hw,
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&ring[AQ_VEC_RX_ID]);
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if (err < 0)
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goto err_exit;
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if (ring[AQ_VEC_RX_ID].sw_head !=
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ring[AQ_VEC_RX_ID].hw_head) {
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err = aq_ring_rx_clean(&ring[AQ_VEC_RX_ID],
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napi,
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&work_done,
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budget - work_done);
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if (err < 0)
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goto err_exit;
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sw_tail_old = ring[AQ_VEC_RX_ID].sw_tail;
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err = aq_ring_rx_fill(&ring[AQ_VEC_RX_ID]);
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if (err < 0)
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goto err_exit;
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err = self->aq_hw_ops->hw_ring_rx_fill(
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self->aq_hw,
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&ring[AQ_VEC_RX_ID], sw_tail_old);
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if (err < 0)
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goto err_exit;
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}
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}
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err_exit:
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if (!was_tx_cleaned)
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work_done = budget;
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if (work_done < budget) {
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napi_complete_done(napi, work_done);
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self->aq_hw_ops->hw_irq_enable(self->aq_hw,
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1U << self->aq_ring_param.vec_idx);
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}
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}
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return work_done;
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}
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struct aq_vec_s *aq_vec_alloc(struct aq_nic_s *aq_nic, unsigned int idx,
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struct aq_nic_cfg_s *aq_nic_cfg)
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{
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struct aq_vec_s *self = NULL;
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struct aq_ring_s *ring = NULL;
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unsigned int i = 0U;
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int err = 0;
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self = kzalloc(sizeof(*self), GFP_KERNEL);
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if (!self) {
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err = -ENOMEM;
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goto err_exit;
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}
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self->aq_nic = aq_nic;
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self->aq_ring_param.vec_idx = idx;
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self->aq_ring_param.cpu =
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idx + aq_nic_cfg->aq_rss.base_cpu_number;
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cpumask_set_cpu(self->aq_ring_param.cpu,
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&self->aq_ring_param.affinity_mask);
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self->tx_rings = 0;
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self->rx_rings = 0;
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netif_napi_add(aq_nic_get_ndev(aq_nic), &self->napi,
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aq_vec_poll, AQ_CFG_NAPI_WEIGHT);
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for (i = 0; i < aq_nic_cfg->tcs; ++i) {
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unsigned int idx_ring = AQ_NIC_TCVEC2RING(self->nic,
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self->tx_rings,
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self->aq_ring_param.vec_idx);
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ring = aq_ring_tx_alloc(&self->ring[i][AQ_VEC_TX_ID], aq_nic,
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idx_ring, aq_nic_cfg);
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if (!ring) {
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err = -ENOMEM;
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goto err_exit;
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}
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++self->tx_rings;
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aq_nic_set_tx_ring(aq_nic, idx_ring, ring);
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ring = aq_ring_rx_alloc(&self->ring[i][AQ_VEC_RX_ID], aq_nic,
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idx_ring, aq_nic_cfg);
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if (!ring) {
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err = -ENOMEM;
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goto err_exit;
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}
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++self->rx_rings;
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}
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err_exit:
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if (err < 0) {
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aq_vec_free(self);
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self = NULL;
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}
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return self;
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}
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int aq_vec_init(struct aq_vec_s *self, const struct aq_hw_ops *aq_hw_ops,
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struct aq_hw_s *aq_hw)
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{
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struct aq_ring_s *ring = NULL;
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unsigned int i = 0U;
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int err = 0;
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self->aq_hw_ops = aq_hw_ops;
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self->aq_hw = aq_hw;
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for (i = 0U, ring = self->ring[0];
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self->tx_rings > i; ++i, ring = self->ring[i]) {
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err = aq_ring_init(&ring[AQ_VEC_TX_ID]);
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if (err < 0)
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goto err_exit;
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err = self->aq_hw_ops->hw_ring_tx_init(self->aq_hw,
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&ring[AQ_VEC_TX_ID],
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&self->aq_ring_param);
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if (err < 0)
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goto err_exit;
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err = aq_ring_init(&ring[AQ_VEC_RX_ID]);
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if (err < 0)
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goto err_exit;
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err = self->aq_hw_ops->hw_ring_rx_init(self->aq_hw,
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&ring[AQ_VEC_RX_ID],
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&self->aq_ring_param);
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if (err < 0)
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goto err_exit;
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err = aq_ring_rx_fill(&ring[AQ_VEC_RX_ID]);
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if (err < 0)
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goto err_exit;
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err = self->aq_hw_ops->hw_ring_rx_fill(self->aq_hw,
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&ring[AQ_VEC_RX_ID], 0U);
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if (err < 0)
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goto err_exit;
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}
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err_exit:
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return err;
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}
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int aq_vec_start(struct aq_vec_s *self)
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{
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struct aq_ring_s *ring = NULL;
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unsigned int i = 0U;
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int err = 0;
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for (i = 0U, ring = self->ring[0];
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self->tx_rings > i; ++i, ring = self->ring[i]) {
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err = self->aq_hw_ops->hw_ring_tx_start(self->aq_hw,
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&ring[AQ_VEC_TX_ID]);
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if (err < 0)
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goto err_exit;
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err = self->aq_hw_ops->hw_ring_rx_start(self->aq_hw,
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&ring[AQ_VEC_RX_ID]);
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if (err < 0)
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goto err_exit;
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}
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napi_enable(&self->napi);
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err_exit:
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return err;
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}
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void aq_vec_stop(struct aq_vec_s *self)
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{
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struct aq_ring_s *ring = NULL;
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unsigned int i = 0U;
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for (i = 0U, ring = self->ring[0];
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self->tx_rings > i; ++i, ring = self->ring[i]) {
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self->aq_hw_ops->hw_ring_tx_stop(self->aq_hw,
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&ring[AQ_VEC_TX_ID]);
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self->aq_hw_ops->hw_ring_rx_stop(self->aq_hw,
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&ring[AQ_VEC_RX_ID]);
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}
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napi_disable(&self->napi);
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}
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void aq_vec_deinit(struct aq_vec_s *self)
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{
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struct aq_ring_s *ring = NULL;
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unsigned int i = 0U;
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if (!self)
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goto err_exit;
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for (i = 0U, ring = self->ring[0];
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self->tx_rings > i; ++i, ring = self->ring[i]) {
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aq_ring_tx_clean(&ring[AQ_VEC_TX_ID]);
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aq_ring_rx_deinit(&ring[AQ_VEC_RX_ID]);
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}
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err_exit:;
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}
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void aq_vec_free(struct aq_vec_s *self)
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{
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struct aq_ring_s *ring = NULL;
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unsigned int i = 0U;
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if (!self)
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goto err_exit;
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for (i = 0U, ring = self->ring[0];
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self->tx_rings > i; ++i, ring = self->ring[i]) {
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aq_ring_free(&ring[AQ_VEC_TX_ID]);
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aq_ring_free(&ring[AQ_VEC_RX_ID]);
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}
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netif_napi_del(&self->napi);
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kfree(self);
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err_exit:;
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}
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irqreturn_t aq_vec_isr(int irq, void *private)
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{
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struct aq_vec_s *self = private;
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int err = 0;
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if (!self) {
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err = -EINVAL;
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goto err_exit;
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}
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napi_schedule(&self->napi);
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err_exit:
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return err >= 0 ? IRQ_HANDLED : IRQ_NONE;
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}
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irqreturn_t aq_vec_isr_legacy(int irq, void *private)
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{
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struct aq_vec_s *self = private;
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u64 irq_mask = 0U;
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int err;
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if (!self)
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return IRQ_NONE;
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err = self->aq_hw_ops->hw_irq_read(self->aq_hw, &irq_mask);
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if (err < 0)
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return IRQ_NONE;
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if (irq_mask) {
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self->aq_hw_ops->hw_irq_disable(self->aq_hw,
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1U << self->aq_ring_param.vec_idx);
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napi_schedule(&self->napi);
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} else {
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self->aq_hw_ops->hw_irq_enable(self->aq_hw, 1U);
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return IRQ_NONE;
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}
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return IRQ_HANDLED;
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}
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cpumask_t *aq_vec_get_affinity_mask(struct aq_vec_s *self)
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{
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return &self->aq_ring_param.affinity_mask;
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}
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void aq_vec_add_stats(struct aq_vec_s *self,
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struct aq_ring_stats_rx_s *stats_rx,
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struct aq_ring_stats_tx_s *stats_tx)
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{
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struct aq_ring_s *ring = NULL;
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unsigned int r = 0U;
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for (r = 0U, ring = self->ring[0];
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self->tx_rings > r; ++r, ring = self->ring[r]) {
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struct aq_ring_stats_tx_s *tx = &ring[AQ_VEC_TX_ID].stats.tx;
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struct aq_ring_stats_rx_s *rx = &ring[AQ_VEC_RX_ID].stats.rx;
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stats_rx->packets += rx->packets;
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stats_rx->bytes += rx->bytes;
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stats_rx->errors += rx->errors;
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stats_rx->jumbo_packets += rx->jumbo_packets;
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stats_rx->lro_packets += rx->lro_packets;
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stats_tx->packets += tx->packets;
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stats_tx->bytes += tx->bytes;
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stats_tx->errors += tx->errors;
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stats_tx->queue_restarts += tx->queue_restarts;
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}
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}
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int aq_vec_get_sw_stats(struct aq_vec_s *self, u64 *data, unsigned int *p_count)
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{
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unsigned int count = 0U;
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struct aq_ring_stats_rx_s stats_rx;
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struct aq_ring_stats_tx_s stats_tx;
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memset(&stats_rx, 0U, sizeof(struct aq_ring_stats_rx_s));
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memset(&stats_tx, 0U, sizeof(struct aq_ring_stats_tx_s));
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aq_vec_add_stats(self, &stats_rx, &stats_tx);
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/* This data should mimic aq_ethtool_queue_stat_names structure
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*/
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data[count] += stats_rx.packets;
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data[++count] += stats_tx.packets;
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data[++count] += stats_tx.queue_restarts;
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data[++count] += stats_rx.jumbo_packets;
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data[++count] += stats_rx.lro_packets;
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data[++count] += stats_rx.errors;
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if (p_count)
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*p_count = ++count;
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return 0;
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}
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