c05564c4d8
Android 13
389 lines
9.5 KiB
C
Executable file
389 lines
9.5 KiB
C
Executable file
/* cnic_if.h: QLogic cnic core network driver.
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*
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* Copyright (c) 2006-2014 Broadcom Corporation
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* Copyright (c) 2014-2015 QLogic Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*
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*/
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#ifndef CNIC_IF_H
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#define CNIC_IF_H
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#include "bnx2x/bnx2x_mfw_req.h"
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#define CNIC_MODULE_VERSION "2.5.22"
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#define CNIC_MODULE_RELDATE "July 20, 2015"
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#define CNIC_ULP_RDMA 0
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#define CNIC_ULP_ISCSI 1
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#define CNIC_ULP_FCOE 2
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#define CNIC_ULP_L4 3
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#define MAX_CNIC_ULP_TYPE_EXT 3
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#define MAX_CNIC_ULP_TYPE 4
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/* Use CPU native page size up to 16K for cnic ring sizes. */
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#if (PAGE_SHIFT > 14)
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#define CNIC_PAGE_BITS 14
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#else
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#define CNIC_PAGE_BITS PAGE_SHIFT
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#endif
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#define CNIC_PAGE_SIZE (1 << (CNIC_PAGE_BITS))
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#define CNIC_PAGE_ALIGN(addr) ALIGN(addr, CNIC_PAGE_SIZE)
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#define CNIC_PAGE_MASK (~((CNIC_PAGE_SIZE) - 1))
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struct kwqe {
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u32 kwqe_op_flag;
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#define KWQE_QID_SHIFT 8
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#define KWQE_OPCODE_MASK 0x00ff0000
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#define KWQE_OPCODE_SHIFT 16
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#define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
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#define KWQE_LAYER_MASK 0x70000000
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#define KWQE_LAYER_SHIFT 28
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#define KWQE_FLAGS_LAYER_MASK_L2 (2<<28)
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#define KWQE_FLAGS_LAYER_MASK_L3 (3<<28)
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#define KWQE_FLAGS_LAYER_MASK_L4 (4<<28)
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#define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
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#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
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#define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
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u32 kwqe_info0;
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u32 kwqe_info1;
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u32 kwqe_info2;
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u32 kwqe_info3;
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u32 kwqe_info4;
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u32 kwqe_info5;
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u32 kwqe_info6;
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};
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struct kwqe_16 {
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u32 kwqe_info0;
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u32 kwqe_info1;
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u32 kwqe_info2;
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u32 kwqe_info3;
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};
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struct kcqe {
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u32 kcqe_info0;
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u32 kcqe_info1;
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u32 kcqe_info2;
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u32 kcqe_info3;
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u32 kcqe_info4;
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u32 kcqe_info5;
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u32 kcqe_info6;
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u32 kcqe_op_flag;
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#define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */
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#define KCQE_FLAGS_LAYER_MASK (0x7<<28)
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#define KCQE_FLAGS_LAYER_MASK_MISC (0<<28)
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#define KCQE_FLAGS_LAYER_MASK_L2 (2<<28)
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#define KCQE_FLAGS_LAYER_MASK_L3 (3<<28)
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#define KCQE_FLAGS_LAYER_MASK_L4 (4<<28)
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#define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
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#define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
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#define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
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#define KCQE_FLAGS_NEXT (1<<31)
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#define KCQE_FLAGS_OPCODE_MASK (0xff<<16)
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#define KCQE_FLAGS_OPCODE_SHIFT (16)
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#define KCQE_OPCODE(op) \
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(((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
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};
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#define MAX_CNIC_CTL_DATA 64
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#define MAX_DRV_CTL_DATA 64
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#define CNIC_CTL_STOP_CMD 1
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#define CNIC_CTL_START_CMD 2
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#define CNIC_CTL_COMPLETION_CMD 3
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#define CNIC_CTL_STOP_ISCSI_CMD 4
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#define CNIC_CTL_FCOE_STATS_GET_CMD 5
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#define CNIC_CTL_ISCSI_STATS_GET_CMD 6
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#define DRV_CTL_IO_WR_CMD 0x101
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#define DRV_CTL_IO_RD_CMD 0x102
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#define DRV_CTL_CTX_WR_CMD 0x103
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#define DRV_CTL_CTXTBL_WR_CMD 0x104
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#define DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105
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#define DRV_CTL_START_L2_CMD 0x106
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#define DRV_CTL_STOP_L2_CMD 0x107
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#define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c
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#define DRV_CTL_ISCSI_STOPPED_CMD 0x10d
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#define DRV_CTL_ULP_REGISTER_CMD 0x10e
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#define DRV_CTL_ULP_UNREGISTER_CMD 0x10f
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struct cnic_ctl_completion {
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u32 cid;
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u8 opcode;
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u8 error;
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};
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struct cnic_ctl_info {
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int cmd;
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union {
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struct cnic_ctl_completion comp;
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char bytes[MAX_CNIC_CTL_DATA];
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} data;
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};
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struct drv_ctl_spq_credit {
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u32 credit_count;
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};
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struct drv_ctl_io {
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u32 cid_addr;
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u32 offset;
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u32 data;
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dma_addr_t dma_addr;
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};
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struct drv_ctl_l2_ring {
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u32 client_id;
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u32 cid;
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};
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struct drv_ctl_register_data {
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int ulp_type;
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struct fcoe_capabilities fcoe_features;
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};
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struct drv_ctl_info {
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int cmd;
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int drv_state;
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#define DRV_NOP 0
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#define DRV_ACTIVE 1
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#define DRV_INACTIVE 2
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#define DRV_UNLOADED 3
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union {
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struct drv_ctl_spq_credit credit;
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struct drv_ctl_io io;
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struct drv_ctl_l2_ring ring;
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int ulp_type;
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struct drv_ctl_register_data register_data;
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char bytes[MAX_DRV_CTL_DATA];
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} data;
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};
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#define MAX_NPIV_ENTRIES 64
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#define FC_NPIV_WWN_SIZE 8
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struct cnic_fc_npiv_tbl {
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u8 wwpn[MAX_NPIV_ENTRIES][FC_NPIV_WWN_SIZE];
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u8 wwnn[MAX_NPIV_ENTRIES][FC_NPIV_WWN_SIZE];
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u32 count;
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};
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struct cnic_ops {
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struct module *cnic_owner;
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/* Calls to these functions are protected by RCU. When
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* unregistering, we wait for any calls to complete before
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* continuing.
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*/
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int (*cnic_handler)(void *, void *);
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int (*cnic_ctl)(void *, struct cnic_ctl_info *);
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};
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#define MAX_CNIC_VEC 8
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struct cnic_irq {
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unsigned int vector;
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void *status_blk;
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u32 status_blk_num;
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u32 status_blk_num2;
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u32 irq_flags;
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#define CNIC_IRQ_FL_MSIX 0x00000001
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};
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struct cnic_eth_dev {
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struct module *drv_owner;
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u32 drv_state;
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#define CNIC_DRV_STATE_REGD 0x00000001
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#define CNIC_DRV_STATE_USING_MSIX 0x00000002
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#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
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#define CNIC_DRV_STATE_NO_ISCSI 0x00000008
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#define CNIC_DRV_STATE_NO_FCOE 0x00000010
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#define CNIC_DRV_STATE_HANDLES_IRQ 0x00000020
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u32 chip_id;
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u32 max_kwqe_pending;
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struct pci_dev *pdev;
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void __iomem *io_base;
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void __iomem *io_base2;
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const void *iro_arr;
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u32 ctx_tbl_offset;
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u32 ctx_tbl_len;
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int ctx_blk_size;
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u32 starting_cid;
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u32 max_iscsi_conn;
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u32 max_fcoe_conn;
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u32 max_rdma_conn;
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u32 fcoe_init_cid;
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u32 max_fcoe_exchanges;
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u32 fcoe_wwn_port_name_hi;
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u32 fcoe_wwn_port_name_lo;
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u32 fcoe_wwn_node_name_hi;
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u32 fcoe_wwn_node_name_lo;
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u16 iscsi_l2_client_id;
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u16 iscsi_l2_cid;
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u8 iscsi_mac[ETH_ALEN];
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int num_irq;
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struct cnic_irq irq_arr[MAX_CNIC_VEC];
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int (*drv_register_cnic)(struct net_device *,
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struct cnic_ops *, void *);
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int (*drv_unregister_cnic)(struct net_device *);
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int (*drv_submit_kwqes_32)(struct net_device *,
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struct kwqe *[], u32);
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int (*drv_submit_kwqes_16)(struct net_device *,
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struct kwqe_16 *[], u32);
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int (*drv_ctl)(struct net_device *, struct drv_ctl_info *);
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int (*drv_get_fc_npiv_tbl)(struct net_device *,
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struct cnic_fc_npiv_tbl *);
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unsigned long reserved1[2];
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union drv_info_to_mcp *addr_drv_info_to_mcp;
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};
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struct cnic_sockaddr {
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union {
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struct sockaddr_in v4;
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struct sockaddr_in6 v6;
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} local;
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union {
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struct sockaddr_in v4;
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struct sockaddr_in6 v6;
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} remote;
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};
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struct cnic_sock {
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struct cnic_dev *dev;
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void *context;
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u32 src_ip[4];
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u32 dst_ip[4];
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u16 src_port;
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u16 dst_port;
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u16 vlan_id;
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unsigned char old_ha[ETH_ALEN];
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unsigned char ha[ETH_ALEN];
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u32 mtu;
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u32 cid;
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u32 l5_cid;
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u32 pg_cid;
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int ulp_type;
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u32 ka_timeout;
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u32 ka_interval;
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u8 ka_max_probe_count;
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u8 tos;
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u8 ttl;
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u8 snd_seq_scale;
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u32 rcv_buf;
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u32 snd_buf;
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u32 seed;
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unsigned long tcp_flags;
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#define SK_TCP_NO_DELAY_ACK 0x1
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#define SK_TCP_KEEP_ALIVE 0x2
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#define SK_TCP_NAGLE 0x4
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#define SK_TCP_TIMESTAMP 0x8
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#define SK_TCP_SACK 0x10
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#define SK_TCP_SEG_SCALING 0x20
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unsigned long flags;
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#define SK_F_INUSE 0
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#define SK_F_OFFLD_COMPLETE 1
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#define SK_F_OFFLD_SCHED 2
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#define SK_F_PG_OFFLD_COMPLETE 3
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#define SK_F_CONNECT_START 4
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#define SK_F_IPV6 5
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#define SK_F_CLOSING 7
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#define SK_F_HW_ERR 8
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atomic_t ref_count;
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u32 state;
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struct kwqe kwqe1;
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struct kwqe kwqe2;
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struct kwqe kwqe3;
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};
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struct cnic_dev {
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struct net_device *netdev;
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struct pci_dev *pcidev;
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void __iomem *regview;
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struct list_head list;
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int (*register_device)(struct cnic_dev *dev, int ulp_type,
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void *ulp_ctx);
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int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
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int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
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u32 num_wqes);
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int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
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u32 num_wqes);
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int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
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void *);
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int (*cm_destroy)(struct cnic_sock *);
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int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
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int (*cm_abort)(struct cnic_sock *);
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int (*cm_close)(struct cnic_sock *);
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struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
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int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
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char *data, u16 data_size);
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int (*get_fc_npiv_tbl)(struct cnic_dev *, struct cnic_fc_npiv_tbl *);
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unsigned long flags;
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#define CNIC_F_CNIC_UP 1
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#define CNIC_F_BNX2_CLASS 3
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#define CNIC_F_BNX2X_CLASS 4
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atomic_t ref_count;
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u8 mac_addr[ETH_ALEN];
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int max_iscsi_conn;
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int max_fcoe_conn;
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int max_rdma_conn;
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int max_fcoe_exchanges;
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union drv_info_to_mcp *stats_addr;
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struct fcoe_capabilities *fcoe_cap;
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void *cnic_priv;
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};
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#define CNIC_WR(dev, off, val) writel(val, dev->regview + off)
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#define CNIC_WR16(dev, off, val) writew(val, dev->regview + off)
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#define CNIC_WR8(dev, off, val) writeb(val, dev->regview + off)
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#define CNIC_RD(dev, off) readl(dev->regview + off)
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#define CNIC_RD16(dev, off) readw(dev->regview + off)
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struct cnic_ulp_ops {
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/* Calls to these functions are protected by RCU. When
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* unregistering, we wait for any calls to complete before
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* continuing.
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*/
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void (*cnic_init)(struct cnic_dev *dev);
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void (*cnic_exit)(struct cnic_dev *dev);
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void (*cnic_start)(void *ulp_ctx);
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void (*cnic_stop)(void *ulp_ctx);
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void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
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u32 num_cqes);
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void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid);
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void (*cm_connect_complete)(struct cnic_sock *);
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void (*cm_close_complete)(struct cnic_sock *);
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void (*cm_abort_complete)(struct cnic_sock *);
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void (*cm_remote_close)(struct cnic_sock *);
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void (*cm_remote_abort)(struct cnic_sock *);
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int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
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char *data, u16 data_size);
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int (*cnic_get_stats)(void *ulp_ctx);
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struct module *owner;
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atomic_t ref_count;
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};
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int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
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int cnic_unregister_driver(int ulp_type);
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#endif
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