c05564c4d8
Android 13
480 lines
12 KiB
C
Executable file
480 lines
12 KiB
C
Executable file
/*
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* Ethernet on Serial Communications Controller (SCC) driver for Motorola MPC8xx and MPC82xx.
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*
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* Copyright (c) 2003 Intracom S.A.
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* by Pantelis Antoniou <panto@intracom.gr>
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*
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* 2005 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/ptrace.h>
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#include <linux/errno.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/skbuff.h>
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#include <linux/spinlock.h>
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#include <linux/mii.h>
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#include <linux/ethtool.h>
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#include <linux/bitops.h>
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#include <linux/fs.h>
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#include <linux/platform_device.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/irq.h>
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#include <linux/uaccess.h>
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#include "fs_enet.h"
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/*************************************************/
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#if defined(CONFIG_CPM1)
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/* for a 8xx __raw_xxx's are sufficient */
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#define __fs_out32(addr, x) __raw_writel(x, addr)
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#define __fs_out16(addr, x) __raw_writew(x, addr)
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#define __fs_out8(addr, x) __raw_writeb(x, addr)
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#define __fs_in32(addr) __raw_readl(addr)
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#define __fs_in16(addr) __raw_readw(addr)
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#define __fs_in8(addr) __raw_readb(addr)
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#else
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/* for others play it safe */
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#define __fs_out32(addr, x) out_be32(addr, x)
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#define __fs_out16(addr, x) out_be16(addr, x)
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#define __fs_in32(addr) in_be32(addr)
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#define __fs_in16(addr) in_be16(addr)
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#define __fs_out8(addr, x) out_8(addr, x)
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#define __fs_in8(addr) in_8(addr)
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#endif
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/* write, read, set bits, clear bits */
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#define W32(_p, _m, _v) __fs_out32(&(_p)->_m, (_v))
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#define R32(_p, _m) __fs_in32(&(_p)->_m)
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#define S32(_p, _m, _v) W32(_p, _m, R32(_p, _m) | (_v))
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#define C32(_p, _m, _v) W32(_p, _m, R32(_p, _m) & ~(_v))
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#define W16(_p, _m, _v) __fs_out16(&(_p)->_m, (_v))
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#define R16(_p, _m) __fs_in16(&(_p)->_m)
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#define S16(_p, _m, _v) W16(_p, _m, R16(_p, _m) | (_v))
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#define C16(_p, _m, _v) W16(_p, _m, R16(_p, _m) & ~(_v))
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#define W8(_p, _m, _v) __fs_out8(&(_p)->_m, (_v))
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#define R8(_p, _m) __fs_in8(&(_p)->_m)
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#define S8(_p, _m, _v) W8(_p, _m, R8(_p, _m) | (_v))
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#define C8(_p, _m, _v) W8(_p, _m, R8(_p, _m) & ~(_v))
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#define SCC_MAX_MULTICAST_ADDRS 64
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/*
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* Delay to wait for SCC reset command to complete (in us)
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*/
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#define SCC_RESET_DELAY 50
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static inline int scc_cr_cmd(struct fs_enet_private *fep, u32 op)
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{
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const struct fs_platform_info *fpi = fep->fpi;
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return cpm_command(fpi->cp_command, op);
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}
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static int do_pd_setup(struct fs_enet_private *fep)
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{
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struct platform_device *ofdev = to_platform_device(fep->dev);
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fep->interrupt = irq_of_parse_and_map(ofdev->dev.of_node, 0);
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if (!fep->interrupt)
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return -EINVAL;
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fep->scc.sccp = of_iomap(ofdev->dev.of_node, 0);
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if (!fep->scc.sccp)
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return -EINVAL;
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fep->scc.ep = of_iomap(ofdev->dev.of_node, 1);
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if (!fep->scc.ep) {
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iounmap(fep->scc.sccp);
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return -EINVAL;
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}
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return 0;
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}
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#define SCC_NAPI_EVENT_MSK (SCCE_ENET_RXF | SCCE_ENET_RXB | SCCE_ENET_TXB)
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#define SCC_EVENT (SCCE_ENET_RXF | SCCE_ENET_TXB)
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#define SCC_ERR_EVENT_MSK (SCCE_ENET_TXE | SCCE_ENET_BSY)
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static int setup_data(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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do_pd_setup(fep);
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fep->scc.hthi = 0;
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fep->scc.htlo = 0;
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fep->ev_napi = SCC_NAPI_EVENT_MSK;
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fep->ev = SCC_EVENT | SCCE_ENET_TXE;
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fep->ev_err = SCC_ERR_EVENT_MSK;
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return 0;
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}
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static int allocate_bd(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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const struct fs_platform_info *fpi = fep->fpi;
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fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
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sizeof(cbd_t), 8);
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if (IS_ERR_VALUE(fep->ring_mem_addr))
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return -ENOMEM;
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fep->ring_base = (void __iomem __force*)
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cpm_dpram_addr(fep->ring_mem_addr);
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return 0;
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}
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static void free_bd(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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if (fep->ring_base)
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cpm_dpfree(fep->ring_mem_addr);
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}
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static void cleanup_data(struct net_device *dev)
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{
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/* nothing */
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}
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static void set_promiscuous_mode(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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S16(sccp, scc_psmr, SCC_PSMR_PRO);
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}
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static void set_multicast_start(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_enet_t __iomem *ep = fep->scc.ep;
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W16(ep, sen_gaddr1, 0);
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W16(ep, sen_gaddr2, 0);
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W16(ep, sen_gaddr3, 0);
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W16(ep, sen_gaddr4, 0);
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}
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static void set_multicast_one(struct net_device *dev, const u8 * mac)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_enet_t __iomem *ep = fep->scc.ep;
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u16 taddrh, taddrm, taddrl;
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taddrh = ((u16) mac[5] << 8) | mac[4];
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taddrm = ((u16) mac[3] << 8) | mac[2];
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taddrl = ((u16) mac[1] << 8) | mac[0];
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W16(ep, sen_taddrh, taddrh);
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W16(ep, sen_taddrm, taddrm);
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W16(ep, sen_taddrl, taddrl);
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scc_cr_cmd(fep, CPM_CR_SET_GADDR);
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}
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static void set_multicast_finish(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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scc_enet_t __iomem *ep = fep->scc.ep;
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/* clear promiscuous always */
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C16(sccp, scc_psmr, SCC_PSMR_PRO);
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/* if all multi or too many multicasts; just enable all */
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if ((dev->flags & IFF_ALLMULTI) != 0 ||
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netdev_mc_count(dev) > SCC_MAX_MULTICAST_ADDRS) {
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W16(ep, sen_gaddr1, 0xffff);
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W16(ep, sen_gaddr2, 0xffff);
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W16(ep, sen_gaddr3, 0xffff);
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W16(ep, sen_gaddr4, 0xffff);
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}
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}
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static void set_multicast_list(struct net_device *dev)
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{
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struct netdev_hw_addr *ha;
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if ((dev->flags & IFF_PROMISC) == 0) {
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set_multicast_start(dev);
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netdev_for_each_mc_addr(ha, dev)
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set_multicast_one(dev, ha->addr);
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set_multicast_finish(dev);
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} else
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set_promiscuous_mode(dev);
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}
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/*
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* This function is called to start or restart the FEC during a link
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* change. This only happens when switching between half and full
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* duplex.
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*/
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static void restart(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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scc_enet_t __iomem *ep = fep->scc.ep;
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const struct fs_platform_info *fpi = fep->fpi;
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u16 paddrh, paddrm, paddrl;
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const unsigned char *mac;
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int i;
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C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
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/* clear everything (slow & steady does it) */
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for (i = 0; i < sizeof(*ep); i++)
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__fs_out8((u8 __iomem *)ep + i, 0);
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/* point to bds */
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W16(ep, sen_genscc.scc_rbase, fep->ring_mem_addr);
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W16(ep, sen_genscc.scc_tbase,
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fep->ring_mem_addr + sizeof(cbd_t) * fpi->rx_ring);
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/* Initialize function code registers for big-endian.
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*/
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#ifndef CONFIG_NOT_COHERENT_CACHE
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W8(ep, sen_genscc.scc_rfcr, SCC_EB | SCC_GBL);
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W8(ep, sen_genscc.scc_tfcr, SCC_EB | SCC_GBL);
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#else
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W8(ep, sen_genscc.scc_rfcr, SCC_EB);
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W8(ep, sen_genscc.scc_tfcr, SCC_EB);
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#endif
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/* Set maximum bytes per receive buffer.
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* This appears to be an Ethernet frame size, not the buffer
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* fragment size. It must be a multiple of four.
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*/
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W16(ep, sen_genscc.scc_mrblr, 0x5f0);
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/* Set CRC preset and mask.
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*/
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W32(ep, sen_cpres, 0xffffffff);
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W32(ep, sen_cmask, 0xdebb20e3);
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W32(ep, sen_crcec, 0); /* CRC Error counter */
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W32(ep, sen_alec, 0); /* alignment error counter */
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W32(ep, sen_disfc, 0); /* discard frame counter */
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W16(ep, sen_pads, 0x8888); /* Tx short frame pad character */
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W16(ep, sen_retlim, 15); /* Retry limit threshold */
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W16(ep, sen_maxflr, 0x5ee); /* maximum frame length register */
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W16(ep, sen_minflr, PKT_MINBUF_SIZE); /* minimum frame length register */
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W16(ep, sen_maxd1, 0x000005f0); /* maximum DMA1 length */
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W16(ep, sen_maxd2, 0x000005f0); /* maximum DMA2 length */
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/* Clear hash tables.
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*/
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W16(ep, sen_gaddr1, 0);
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W16(ep, sen_gaddr2, 0);
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W16(ep, sen_gaddr3, 0);
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W16(ep, sen_gaddr4, 0);
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W16(ep, sen_iaddr1, 0);
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W16(ep, sen_iaddr2, 0);
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W16(ep, sen_iaddr3, 0);
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W16(ep, sen_iaddr4, 0);
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/* set address
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*/
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mac = dev->dev_addr;
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paddrh = ((u16) mac[5] << 8) | mac[4];
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paddrm = ((u16) mac[3] << 8) | mac[2];
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paddrl = ((u16) mac[1] << 8) | mac[0];
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W16(ep, sen_paddrh, paddrh);
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W16(ep, sen_paddrm, paddrm);
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W16(ep, sen_paddrl, paddrl);
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W16(ep, sen_pper, 0);
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W16(ep, sen_taddrl, 0);
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W16(ep, sen_taddrm, 0);
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W16(ep, sen_taddrh, 0);
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fs_init_bds(dev);
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scc_cr_cmd(fep, CPM_CR_INIT_TRX);
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W16(sccp, scc_scce, 0xffff);
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/* Enable interrupts we wish to service.
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*/
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W16(sccp, scc_sccm, SCCE_ENET_TXE | SCCE_ENET_RXF | SCCE_ENET_TXB);
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/* Set GSMR_H to enable all normal operating modes.
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* Set GSMR_L to enable Ethernet to MC68160.
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*/
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W32(sccp, scc_gsmrh, 0);
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W32(sccp, scc_gsmrl,
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SCC_GSMRL_TCI | SCC_GSMRL_TPL_48 | SCC_GSMRL_TPP_10 |
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SCC_GSMRL_MODE_ENET);
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/* Set sync/delimiters.
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*/
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W16(sccp, scc_dsr, 0xd555);
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/* Set processing mode. Use Ethernet CRC, catch broadcast, and
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* start frame search 22 bit times after RENA.
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*/
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W16(sccp, scc_psmr, SCC_PSMR_ENCRC | SCC_PSMR_NIB22);
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/* Set full duplex mode if needed */
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if (dev->phydev->duplex)
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S16(sccp, scc_psmr, SCC_PSMR_LPB | SCC_PSMR_FDE);
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/* Restore multicast and promiscuous settings */
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set_multicast_list(dev);
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S32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
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}
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static void stop(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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int i;
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for (i = 0; (R16(sccp, scc_sccm) == 0) && i < SCC_RESET_DELAY; i++)
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udelay(1);
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if (i == SCC_RESET_DELAY)
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dev_warn(fep->dev, "SCC timeout on graceful transmit stop\n");
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W16(sccp, scc_sccm, 0);
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C32(sccp, scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
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fs_cleanup_bds(dev);
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}
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static void napi_clear_event_fs(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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W16(sccp, scc_scce, SCC_NAPI_EVENT_MSK);
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}
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static void napi_enable_fs(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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S16(sccp, scc_sccm, SCC_NAPI_EVENT_MSK);
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}
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static void napi_disable_fs(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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C16(sccp, scc_sccm, SCC_NAPI_EVENT_MSK);
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}
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static void rx_bd_done(struct net_device *dev)
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{
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/* nothing */
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}
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static void tx_kickstart(struct net_device *dev)
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{
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/* nothing */
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}
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static u32 get_int_events(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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return (u32) R16(sccp, scc_scce);
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}
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static void clear_int_events(struct net_device *dev, u32 int_events)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_t __iomem *sccp = fep->scc.sccp;
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W16(sccp, scc_scce, int_events & 0xffff);
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}
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static void ev_error(struct net_device *dev, u32 int_events)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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dev_warn(fep->dev, "SCC ERROR(s) 0x%x\n", int_events);
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}
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static int get_regs(struct net_device *dev, void *p, int *sizep)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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if (*sizep < sizeof(scc_t) + sizeof(scc_enet_t __iomem *))
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return -EINVAL;
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memcpy_fromio(p, fep->scc.sccp, sizeof(scc_t));
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p = (char *)p + sizeof(scc_t);
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memcpy_fromio(p, fep->scc.ep, sizeof(scc_enet_t __iomem *));
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return 0;
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}
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static int get_regs_len(struct net_device *dev)
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{
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return sizeof(scc_t) + sizeof(scc_enet_t __iomem *);
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}
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static void tx_restart(struct net_device *dev)
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{
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struct fs_enet_private *fep = netdev_priv(dev);
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scc_cr_cmd(fep, CPM_CR_RESTART_TX);
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}
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/*************************************************************************/
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const struct fs_ops fs_scc_ops = {
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.setup_data = setup_data,
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.cleanup_data = cleanup_data,
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.set_multicast_list = set_multicast_list,
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.restart = restart,
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.stop = stop,
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.napi_clear_event = napi_clear_event_fs,
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.napi_enable = napi_enable_fs,
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.napi_disable = napi_disable_fs,
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.rx_bd_done = rx_bd_done,
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.tx_kickstart = tx_kickstart,
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.get_int_events = get_int_events,
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.clear_int_events = clear_int_events,
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.ev_error = ev_error,
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.get_regs = get_regs,
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.get_regs_len = get_regs_len,
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.tx_restart = tx_restart,
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.allocate_bd = allocate_bd,
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.free_bd = free_bd,
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};
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