335 lines
8.9 KiB
C
Executable file
335 lines
8.9 KiB
C
Executable file
/*
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* Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
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* Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/workqueue.h>
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#include <linux/module.h>
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#include "mlx4.h"
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enum {
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MLX4_CATAS_POLL_INTERVAL = 5 * HZ,
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};
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int mlx4_internal_err_reset = 1;
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module_param_named(internal_err_reset, mlx4_internal_err_reset, int, 0644);
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MODULE_PARM_DESC(internal_err_reset,
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"Reset device on internal errors if non-zero (default 1)");
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static int read_vendor_id(struct mlx4_dev *dev)
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{
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u16 vendor_id = 0;
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int ret;
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ret = pci_read_config_word(dev->persist->pdev, 0, &vendor_id);
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if (ret) {
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mlx4_err(dev, "Failed to read vendor ID, ret=%d\n", ret);
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return ret;
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}
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if (vendor_id == 0xffff) {
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mlx4_err(dev, "PCI can't be accessed to read vendor id\n");
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return -EINVAL;
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}
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return 0;
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}
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static int mlx4_reset_master(struct mlx4_dev *dev)
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{
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int err = 0;
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if (mlx4_is_master(dev))
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mlx4_report_internal_err_comm_event(dev);
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if (!pci_channel_offline(dev->persist->pdev)) {
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err = read_vendor_id(dev);
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/* If PCI can't be accessed to read vendor ID we assume that its
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* link was disabled and chip was already reset.
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*/
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if (err)
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return 0;
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err = mlx4_reset(dev);
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if (err)
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mlx4_err(dev, "Fail to reset HCA\n");
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}
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return err;
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}
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static int mlx4_reset_slave(struct mlx4_dev *dev)
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{
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#define COM_CHAN_RST_REQ_OFFSET 0x10
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#define COM_CHAN_RST_ACK_OFFSET 0x08
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u32 comm_flags;
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u32 rst_req;
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u32 rst_ack;
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unsigned long end;
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struct mlx4_priv *priv = mlx4_priv(dev);
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if (pci_channel_offline(dev->persist->pdev))
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return 0;
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comm_flags = swab32(readl((__iomem char *)priv->mfunc.comm +
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MLX4_COMM_CHAN_FLAGS));
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if (comm_flags == 0xffffffff) {
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mlx4_err(dev, "VF reset is not needed\n");
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return 0;
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}
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if (!(dev->caps.vf_caps & MLX4_VF_CAP_FLAG_RESET)) {
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mlx4_err(dev, "VF reset is not supported\n");
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return -EOPNOTSUPP;
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}
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rst_req = (comm_flags & (u32)(1 << COM_CHAN_RST_REQ_OFFSET)) >>
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COM_CHAN_RST_REQ_OFFSET;
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rst_ack = (comm_flags & (u32)(1 << COM_CHAN_RST_ACK_OFFSET)) >>
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COM_CHAN_RST_ACK_OFFSET;
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if (rst_req != rst_ack) {
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mlx4_err(dev, "Communication channel isn't sync, fail to send reset\n");
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return -EIO;
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}
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rst_req ^= 1;
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mlx4_warn(dev, "VF is sending reset request to Firmware\n");
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comm_flags = rst_req << COM_CHAN_RST_REQ_OFFSET;
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__raw_writel((__force u32)cpu_to_be32(comm_flags),
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(__iomem char *)priv->mfunc.comm + MLX4_COMM_CHAN_FLAGS);
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/* Make sure that our comm channel write doesn't
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* get mixed in with writes from another CPU.
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*/
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mmiowb();
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end = msecs_to_jiffies(MLX4_COMM_TIME) + jiffies;
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while (time_before(jiffies, end)) {
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comm_flags = swab32(readl((__iomem char *)priv->mfunc.comm +
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MLX4_COMM_CHAN_FLAGS));
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rst_ack = (comm_flags & (u32)(1 << COM_CHAN_RST_ACK_OFFSET)) >>
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COM_CHAN_RST_ACK_OFFSET;
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/* Reading rst_req again since the communication channel can
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* be reset at any time by the PF and all its bits will be
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* set to zero.
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*/
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rst_req = (comm_flags & (u32)(1 << COM_CHAN_RST_REQ_OFFSET)) >>
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COM_CHAN_RST_REQ_OFFSET;
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if (rst_ack == rst_req) {
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mlx4_warn(dev, "VF Reset succeed\n");
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return 0;
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}
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cond_resched();
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}
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mlx4_err(dev, "Fail to send reset over the communication channel\n");
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return -ETIMEDOUT;
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}
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int mlx4_comm_internal_err(u32 slave_read)
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{
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return (u32)COMM_CHAN_EVENT_INTERNAL_ERR ==
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(slave_read & (u32)COMM_CHAN_EVENT_INTERNAL_ERR) ? 1 : 0;
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}
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void mlx4_enter_error_state(struct mlx4_dev_persistent *persist)
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{
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int err;
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struct mlx4_dev *dev;
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if (!mlx4_internal_err_reset)
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return;
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mutex_lock(&persist->device_state_mutex);
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if (persist->state & MLX4_DEVICE_STATE_INTERNAL_ERROR)
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goto out;
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dev = persist->dev;
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mlx4_err(dev, "device is going to be reset\n");
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if (mlx4_is_slave(dev)) {
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err = mlx4_reset_slave(dev);
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} else {
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mlx4_crdump_collect(dev);
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err = mlx4_reset_master(dev);
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}
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if (!err) {
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mlx4_err(dev, "device was reset successfully\n");
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} else {
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/* EEH could have disabled the PCI channel during reset. That's
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* recoverable and the PCI error flow will handle it.
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*/
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if (!pci_channel_offline(dev->persist->pdev))
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BUG_ON(1);
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}
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dev->persist->state |= MLX4_DEVICE_STATE_INTERNAL_ERROR;
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mutex_unlock(&persist->device_state_mutex);
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/* At that step HW was already reset, now notify clients */
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mlx4_dispatch_event(dev, MLX4_DEV_EVENT_CATASTROPHIC_ERROR, 0);
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mlx4_cmd_wake_completions(dev);
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return;
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out:
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mutex_unlock(&persist->device_state_mutex);
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}
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static void mlx4_handle_error_state(struct mlx4_dev_persistent *persist)
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{
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int err = 0;
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mlx4_enter_error_state(persist);
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mutex_lock(&persist->interface_state_mutex);
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if (persist->interface_state & MLX4_INTERFACE_STATE_UP &&
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!(persist->interface_state & MLX4_INTERFACE_STATE_DELETION)) {
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err = mlx4_restart_one(persist->pdev, false, NULL);
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mlx4_info(persist->dev, "mlx4_restart_one was ended, ret=%d\n",
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err);
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}
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mutex_unlock(&persist->interface_state_mutex);
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}
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static void dump_err_buf(struct mlx4_dev *dev)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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int i;
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mlx4_err(dev, "Internal error detected:\n");
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for (i = 0; i < priv->fw.catas_size; ++i)
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mlx4_err(dev, " buf[%02x]: %08x\n",
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i, swab32(readl(priv->catas_err.map + i)));
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}
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static void poll_catas(struct timer_list *t)
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{
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struct mlx4_priv *priv = from_timer(priv, t, catas_err.timer);
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struct mlx4_dev *dev = &priv->dev;
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u32 slave_read;
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if (mlx4_is_slave(dev)) {
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slave_read = swab32(readl(&priv->mfunc.comm->slave_read));
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if (mlx4_comm_internal_err(slave_read)) {
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mlx4_warn(dev, "Internal error detected on the communication channel\n");
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goto internal_err;
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}
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} else if (readl(priv->catas_err.map)) {
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dump_err_buf(dev);
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goto internal_err;
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}
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if (dev->persist->state & MLX4_DEVICE_STATE_INTERNAL_ERROR) {
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mlx4_warn(dev, "Internal error mark was detected on device\n");
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goto internal_err;
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}
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mod_timer(&priv->catas_err.timer,
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round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL));
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return;
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internal_err:
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if (mlx4_internal_err_reset)
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queue_work(dev->persist->catas_wq, &dev->persist->catas_work);
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}
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static void catas_reset(struct work_struct *work)
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{
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struct mlx4_dev_persistent *persist =
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container_of(work, struct mlx4_dev_persistent,
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catas_work);
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mlx4_handle_error_state(persist);
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}
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void mlx4_start_catas_poll(struct mlx4_dev *dev)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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phys_addr_t addr;
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INIT_LIST_HEAD(&priv->catas_err.list);
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timer_setup(&priv->catas_err.timer, poll_catas, 0);
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priv->catas_err.map = NULL;
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if (!mlx4_is_slave(dev)) {
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addr = pci_resource_start(dev->persist->pdev,
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priv->fw.catas_bar) +
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priv->fw.catas_offset;
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priv->catas_err.map = ioremap(addr, priv->fw.catas_size * 4);
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if (!priv->catas_err.map) {
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mlx4_warn(dev, "Failed to map internal error buffer at 0x%llx\n",
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(unsigned long long)addr);
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return;
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}
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}
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priv->catas_err.timer.expires =
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round_jiffies(jiffies + MLX4_CATAS_POLL_INTERVAL);
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add_timer(&priv->catas_err.timer);
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}
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void mlx4_stop_catas_poll(struct mlx4_dev *dev)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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del_timer_sync(&priv->catas_err.timer);
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if (priv->catas_err.map) {
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iounmap(priv->catas_err.map);
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priv->catas_err.map = NULL;
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}
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if (dev->persist->interface_state & MLX4_INTERFACE_STATE_DELETION)
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flush_workqueue(dev->persist->catas_wq);
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}
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int mlx4_catas_init(struct mlx4_dev *dev)
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{
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INIT_WORK(&dev->persist->catas_work, catas_reset);
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dev->persist->catas_wq = create_singlethread_workqueue("mlx4_health");
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if (!dev->persist->catas_wq)
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return -ENOMEM;
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return 0;
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}
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void mlx4_catas_end(struct mlx4_dev *dev)
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{
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if (dev->persist->catas_wq) {
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destroy_workqueue(dev->persist->catas_wq);
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dev->persist->catas_wq = NULL;
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}
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}
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