585 lines
14 KiB
C
Executable file
585 lines
14 KiB
C
Executable file
/*
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* This file is part of the Chelsio FCoE driver for Linux.
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*
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* Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/cpumask.h>
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#include <linux/string.h>
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#include "csio_init.h"
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#include "csio_hw.h"
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static irqreturn_t
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csio_nondata_isr(int irq, void *dev_id)
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{
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struct csio_hw *hw = (struct csio_hw *) dev_id;
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int rv;
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unsigned long flags;
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if (unlikely(!hw))
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return IRQ_NONE;
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if (unlikely(pci_channel_offline(hw->pdev))) {
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CSIO_INC_STATS(hw, n_pcich_offline);
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return IRQ_NONE;
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}
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spin_lock_irqsave(&hw->lock, flags);
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csio_hw_slow_intr_handler(hw);
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rv = csio_mb_isr_handler(hw);
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if (rv == 0 && !(hw->flags & CSIO_HWF_FWEVT_PENDING)) {
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hw->flags |= CSIO_HWF_FWEVT_PENDING;
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spin_unlock_irqrestore(&hw->lock, flags);
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schedule_work(&hw->evtq_work);
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return IRQ_HANDLED;
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}
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spin_unlock_irqrestore(&hw->lock, flags);
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return IRQ_HANDLED;
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}
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/*
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* csio_fwevt_handler - Common FW event handler routine.
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* @hw: HW module.
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*
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* This is the ISR for FW events. It is shared b/w MSIX
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* and INTx handlers.
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*/
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static void
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csio_fwevt_handler(struct csio_hw *hw)
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{
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int rv;
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unsigned long flags;
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rv = csio_fwevtq_handler(hw);
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spin_lock_irqsave(&hw->lock, flags);
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if (rv == 0 && !(hw->flags & CSIO_HWF_FWEVT_PENDING)) {
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hw->flags |= CSIO_HWF_FWEVT_PENDING;
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spin_unlock_irqrestore(&hw->lock, flags);
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schedule_work(&hw->evtq_work);
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return;
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}
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spin_unlock_irqrestore(&hw->lock, flags);
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} /* csio_fwevt_handler */
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/*
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* csio_fwevt_isr() - FW events MSIX ISR
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* @irq:
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* @dev_id:
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*
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* Process WRs on the FW event queue.
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*
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*/
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static irqreturn_t
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csio_fwevt_isr(int irq, void *dev_id)
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{
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struct csio_hw *hw = (struct csio_hw *) dev_id;
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if (unlikely(!hw))
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return IRQ_NONE;
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if (unlikely(pci_channel_offline(hw->pdev))) {
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CSIO_INC_STATS(hw, n_pcich_offline);
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return IRQ_NONE;
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}
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csio_fwevt_handler(hw);
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return IRQ_HANDLED;
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}
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/*
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* csio_fwevt_isr() - INTx wrapper for handling FW events.
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* @irq:
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* @dev_id:
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*/
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void
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csio_fwevt_intx_handler(struct csio_hw *hw, void *wr, uint32_t len,
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struct csio_fl_dma_buf *flb, void *priv)
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{
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csio_fwevt_handler(hw);
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} /* csio_fwevt_intx_handler */
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/*
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* csio_process_scsi_cmpl - Process a SCSI WR completion.
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* @hw: HW module.
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* @wr: The completed WR from the ingress queue.
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* @len: Length of the WR.
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* @flb: Freelist buffer array.
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*
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*/
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static void
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csio_process_scsi_cmpl(struct csio_hw *hw, void *wr, uint32_t len,
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struct csio_fl_dma_buf *flb, void *cbfn_q)
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{
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struct csio_ioreq *ioreq;
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uint8_t *scsiwr;
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uint8_t subop;
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void *cmnd;
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unsigned long flags;
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ioreq = csio_scsi_cmpl_handler(hw, wr, len, flb, NULL, &scsiwr);
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if (likely(ioreq)) {
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if (unlikely(*scsiwr == FW_SCSI_ABRT_CLS_WR)) {
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subop = FW_SCSI_ABRT_CLS_WR_SUB_OPCODE_GET(
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((struct fw_scsi_abrt_cls_wr *)
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scsiwr)->sub_opcode_to_chk_all_io);
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csio_dbg(hw, "%s cmpl recvd ioreq:%p status:%d\n",
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subop ? "Close" : "Abort",
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ioreq, ioreq->wr_status);
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spin_lock_irqsave(&hw->lock, flags);
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if (subop)
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csio_scsi_closed(ioreq,
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(struct list_head *)cbfn_q);
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else
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csio_scsi_aborted(ioreq,
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(struct list_head *)cbfn_q);
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/*
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* We call scsi_done for I/Os that driver thinks aborts
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* have timed out. If there is a race caused by FW
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* completing abort at the exact same time that the
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* driver has deteced the abort timeout, the following
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* check prevents calling of scsi_done twice for the
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* same command: once from the eh_abort_handler, another
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* from csio_scsi_isr_handler(). This also avoids the
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* need to check if csio_scsi_cmnd(req) is NULL in the
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* fast path.
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*/
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cmnd = csio_scsi_cmnd(ioreq);
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if (unlikely(cmnd == NULL))
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list_del_init(&ioreq->sm.sm_list);
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spin_unlock_irqrestore(&hw->lock, flags);
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if (unlikely(cmnd == NULL))
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csio_put_scsi_ioreq_lock(hw,
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csio_hw_to_scsim(hw), ioreq);
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} else {
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spin_lock_irqsave(&hw->lock, flags);
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csio_scsi_completed(ioreq, (struct list_head *)cbfn_q);
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spin_unlock_irqrestore(&hw->lock, flags);
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}
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}
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}
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/*
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* csio_scsi_isr_handler() - Common SCSI ISR handler.
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* @iq: Ingress queue pointer.
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*
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* Processes SCSI completions on the SCSI IQ indicated by scm->iq_idx
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* by calling csio_wr_process_iq_idx. If there are completions on the
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* isr_cbfn_q, yank them out into a local queue and call their io_cbfns.
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* Once done, add these completions onto the freelist.
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* This routine is shared b/w MSIX and INTx.
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*/
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static inline irqreturn_t
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csio_scsi_isr_handler(struct csio_q *iq)
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{
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struct csio_hw *hw = (struct csio_hw *)iq->owner;
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LIST_HEAD(cbfn_q);
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struct list_head *tmp;
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struct csio_scsim *scm;
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struct csio_ioreq *ioreq;
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int isr_completions = 0;
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scm = csio_hw_to_scsim(hw);
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if (unlikely(csio_wr_process_iq(hw, iq, csio_process_scsi_cmpl,
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&cbfn_q) != 0))
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return IRQ_NONE;
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/* Call back the completion routines */
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list_for_each(tmp, &cbfn_q) {
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ioreq = (struct csio_ioreq *)tmp;
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isr_completions++;
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ioreq->io_cbfn(hw, ioreq);
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/* Release ddp buffer if used for this req */
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if (unlikely(ioreq->dcopy))
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csio_put_scsi_ddp_list_lock(hw, scm, &ioreq->gen_list,
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ioreq->nsge);
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}
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if (isr_completions) {
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/* Return the ioreqs back to ioreq->freelist */
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csio_put_scsi_ioreq_list_lock(hw, scm, &cbfn_q,
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isr_completions);
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}
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return IRQ_HANDLED;
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}
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/*
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* csio_scsi_isr() - SCSI MSIX handler
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* @irq:
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* @dev_id:
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*
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* This is the top level SCSI MSIX handler. Calls csio_scsi_isr_handler()
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* for handling SCSI completions.
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*/
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static irqreturn_t
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csio_scsi_isr(int irq, void *dev_id)
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{
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struct csio_q *iq = (struct csio_q *) dev_id;
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struct csio_hw *hw;
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if (unlikely(!iq))
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return IRQ_NONE;
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hw = (struct csio_hw *)iq->owner;
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if (unlikely(pci_channel_offline(hw->pdev))) {
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CSIO_INC_STATS(hw, n_pcich_offline);
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return IRQ_NONE;
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}
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csio_scsi_isr_handler(iq);
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return IRQ_HANDLED;
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}
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/*
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* csio_scsi_intx_handler() - SCSI INTx handler
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* @irq:
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* @dev_id:
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*
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* This is the top level SCSI INTx handler. Calls csio_scsi_isr_handler()
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* for handling SCSI completions.
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*/
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void
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csio_scsi_intx_handler(struct csio_hw *hw, void *wr, uint32_t len,
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struct csio_fl_dma_buf *flb, void *priv)
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{
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struct csio_q *iq = priv;
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csio_scsi_isr_handler(iq);
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} /* csio_scsi_intx_handler */
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/*
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* csio_fcoe_isr() - INTx/MSI interrupt service routine for FCoE.
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* @irq:
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* @dev_id:
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*
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*
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*/
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static irqreturn_t
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csio_fcoe_isr(int irq, void *dev_id)
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{
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struct csio_hw *hw = (struct csio_hw *) dev_id;
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struct csio_q *intx_q = NULL;
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int rv;
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irqreturn_t ret = IRQ_NONE;
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unsigned long flags;
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if (unlikely(!hw))
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return IRQ_NONE;
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if (unlikely(pci_channel_offline(hw->pdev))) {
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CSIO_INC_STATS(hw, n_pcich_offline);
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return IRQ_NONE;
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}
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/* Disable the interrupt for this PCI function. */
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if (hw->intr_mode == CSIO_IM_INTX)
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csio_wr_reg32(hw, 0, MYPF_REG(PCIE_PF_CLI_A));
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/*
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* The read in the following function will flush the
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* above write.
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*/
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if (csio_hw_slow_intr_handler(hw))
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ret = IRQ_HANDLED;
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/* Get the INTx Forward interrupt IQ. */
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intx_q = csio_get_q(hw, hw->intr_iq_idx);
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CSIO_DB_ASSERT(intx_q);
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/* IQ handler is not possible for intx_q, hence pass in NULL */
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if (likely(csio_wr_process_iq(hw, intx_q, NULL, NULL) == 0))
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ret = IRQ_HANDLED;
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spin_lock_irqsave(&hw->lock, flags);
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rv = csio_mb_isr_handler(hw);
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if (rv == 0 && !(hw->flags & CSIO_HWF_FWEVT_PENDING)) {
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hw->flags |= CSIO_HWF_FWEVT_PENDING;
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spin_unlock_irqrestore(&hw->lock, flags);
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schedule_work(&hw->evtq_work);
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return IRQ_HANDLED;
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}
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spin_unlock_irqrestore(&hw->lock, flags);
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return ret;
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}
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static void
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csio_add_msix_desc(struct csio_hw *hw)
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{
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int i;
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struct csio_msix_entries *entryp = &hw->msix_entries[0];
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int k = CSIO_EXTRA_VECS;
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int len = sizeof(entryp->desc) - 1;
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int cnt = hw->num_sqsets + k;
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/* Non-data vector */
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memset(entryp->desc, 0, len + 1);
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snprintf(entryp->desc, len, "csio-%02x:%02x:%x-nondata",
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CSIO_PCI_BUS(hw), CSIO_PCI_DEV(hw), CSIO_PCI_FUNC(hw));
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entryp++;
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memset(entryp->desc, 0, len + 1);
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snprintf(entryp->desc, len, "csio-%02x:%02x:%x-fwevt",
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CSIO_PCI_BUS(hw), CSIO_PCI_DEV(hw), CSIO_PCI_FUNC(hw));
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entryp++;
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/* Name SCSI vecs */
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for (i = k; i < cnt; i++, entryp++) {
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memset(entryp->desc, 0, len + 1);
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snprintf(entryp->desc, len, "csio-%02x:%02x:%x-scsi%d",
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CSIO_PCI_BUS(hw), CSIO_PCI_DEV(hw),
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CSIO_PCI_FUNC(hw), i - CSIO_EXTRA_VECS);
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}
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}
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int
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csio_request_irqs(struct csio_hw *hw)
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{
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int rv, i, j, k = 0;
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struct csio_msix_entries *entryp = &hw->msix_entries[0];
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struct csio_scsi_cpu_info *info;
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struct pci_dev *pdev = hw->pdev;
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if (hw->intr_mode != CSIO_IM_MSIX) {
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rv = request_irq(pci_irq_vector(pdev, 0), csio_fcoe_isr,
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hw->intr_mode == CSIO_IM_MSI ? 0 : IRQF_SHARED,
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KBUILD_MODNAME, hw);
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if (rv) {
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csio_err(hw, "Failed to allocate interrupt line.\n");
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goto out_free_irqs;
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}
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goto out;
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}
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/* Add the MSIX vector descriptions */
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csio_add_msix_desc(hw);
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rv = request_irq(pci_irq_vector(pdev, k), csio_nondata_isr, 0,
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entryp[k].desc, hw);
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if (rv) {
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csio_err(hw, "IRQ request failed for vec %d err:%d\n",
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pci_irq_vector(pdev, k), rv);
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goto out_free_irqs;
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}
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entryp[k++].dev_id = hw;
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rv = request_irq(pci_irq_vector(pdev, k), csio_fwevt_isr, 0,
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entryp[k].desc, hw);
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if (rv) {
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csio_err(hw, "IRQ request failed for vec %d err:%d\n",
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pci_irq_vector(pdev, k), rv);
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goto out_free_irqs;
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}
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entryp[k++].dev_id = (void *)hw;
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/* Allocate IRQs for SCSI */
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for (i = 0; i < hw->num_pports; i++) {
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info = &hw->scsi_cpu_info[i];
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for (j = 0; j < info->max_cpus; j++, k++) {
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struct csio_scsi_qset *sqset = &hw->sqset[i][j];
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struct csio_q *q = hw->wrm.q_arr[sqset->iq_idx];
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rv = request_irq(pci_irq_vector(pdev, k), csio_scsi_isr, 0,
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entryp[k].desc, q);
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if (rv) {
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csio_err(hw,
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"IRQ request failed for vec %d err:%d\n",
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pci_irq_vector(pdev, k), rv);
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goto out_free_irqs;
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}
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entryp[k].dev_id = q;
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} /* for all scsi cpus */
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} /* for all ports */
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out:
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hw->flags |= CSIO_HWF_HOST_INTR_ENABLED;
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return 0;
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out_free_irqs:
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for (i = 0; i < k; i++)
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free_irq(pci_irq_vector(pdev, i), hw->msix_entries[i].dev_id);
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pci_free_irq_vectors(hw->pdev);
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return -EINVAL;
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}
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/* Reduce per-port max possible CPUs */
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static void
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csio_reduce_sqsets(struct csio_hw *hw, int cnt)
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{
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int i;
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struct csio_scsi_cpu_info *info;
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while (cnt < hw->num_sqsets) {
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for (i = 0; i < hw->num_pports; i++) {
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info = &hw->scsi_cpu_info[i];
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if (info->max_cpus > 1) {
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info->max_cpus--;
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hw->num_sqsets--;
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if (hw->num_sqsets <= cnt)
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break;
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}
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}
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}
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csio_dbg(hw, "Reduced sqsets to %d\n", hw->num_sqsets);
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}
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static int
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csio_enable_msix(struct csio_hw *hw)
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{
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int i, j, k, n, min, cnt;
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int extra = CSIO_EXTRA_VECS;
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struct csio_scsi_cpu_info *info;
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struct irq_affinity desc = { .pre_vectors = 2 };
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min = hw->num_pports + extra;
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cnt = hw->num_sqsets + extra;
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/* Max vectors required based on #niqs configured in fw */
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if (hw->flags & CSIO_HWF_USING_SOFT_PARAMS || !csio_is_hw_master(hw))
|
|
cnt = min_t(uint8_t, hw->cfg_niq, cnt);
|
|
|
|
csio_dbg(hw, "FW supp #niq:%d, trying %d msix's\n", hw->cfg_niq, cnt);
|
|
|
|
cnt = pci_alloc_irq_vectors_affinity(hw->pdev, min, cnt,
|
|
PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, &desc);
|
|
if (cnt < 0)
|
|
return cnt;
|
|
|
|
if (cnt < (hw->num_sqsets + extra)) {
|
|
csio_dbg(hw, "Reducing sqsets to %d\n", cnt - extra);
|
|
csio_reduce_sqsets(hw, cnt - extra);
|
|
}
|
|
|
|
/* Distribute vectors */
|
|
k = 0;
|
|
csio_set_nondata_intr_idx(hw, k);
|
|
csio_set_mb_intr_idx(csio_hw_to_mbm(hw), k++);
|
|
csio_set_fwevt_intr_idx(hw, k++);
|
|
|
|
for (i = 0; i < hw->num_pports; i++) {
|
|
info = &hw->scsi_cpu_info[i];
|
|
|
|
for (j = 0; j < hw->num_scsi_msix_cpus; j++) {
|
|
n = (j % info->max_cpus) + k;
|
|
hw->sqset[i][j].intr_idx = n;
|
|
}
|
|
|
|
k += info->max_cpus;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
csio_intr_enable(struct csio_hw *hw)
|
|
{
|
|
hw->intr_mode = CSIO_IM_NONE;
|
|
hw->flags &= ~CSIO_HWF_HOST_INTR_ENABLED;
|
|
|
|
/* Try MSIX, then MSI or fall back to INTx */
|
|
if ((csio_msi == 2) && !csio_enable_msix(hw))
|
|
hw->intr_mode = CSIO_IM_MSIX;
|
|
else {
|
|
/* Max iqs required based on #niqs configured in fw */
|
|
if (hw->flags & CSIO_HWF_USING_SOFT_PARAMS ||
|
|
!csio_is_hw_master(hw)) {
|
|
int extra = CSIO_EXTRA_MSI_IQS;
|
|
|
|
if (hw->cfg_niq < (hw->num_sqsets + extra)) {
|
|
csio_dbg(hw, "Reducing sqsets to %d\n",
|
|
hw->cfg_niq - extra);
|
|
csio_reduce_sqsets(hw, hw->cfg_niq - extra);
|
|
}
|
|
}
|
|
|
|
if ((csio_msi == 1) && !pci_enable_msi(hw->pdev))
|
|
hw->intr_mode = CSIO_IM_MSI;
|
|
else
|
|
hw->intr_mode = CSIO_IM_INTX;
|
|
}
|
|
|
|
csio_dbg(hw, "Using %s interrupt mode.\n",
|
|
(hw->intr_mode == CSIO_IM_MSIX) ? "MSIX" :
|
|
((hw->intr_mode == CSIO_IM_MSI) ? "MSI" : "INTx"));
|
|
}
|
|
|
|
void
|
|
csio_intr_disable(struct csio_hw *hw, bool free)
|
|
{
|
|
csio_hw_intr_disable(hw);
|
|
|
|
if (free) {
|
|
int i;
|
|
|
|
switch (hw->intr_mode) {
|
|
case CSIO_IM_MSIX:
|
|
for (i = 0; i < hw->num_sqsets + CSIO_EXTRA_VECS; i++) {
|
|
free_irq(pci_irq_vector(hw->pdev, i),
|
|
hw->msix_entries[i].dev_id);
|
|
}
|
|
break;
|
|
case CSIO_IM_MSI:
|
|
case CSIO_IM_INTX:
|
|
free_irq(pci_irq_vector(hw->pdev, 0), hw);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
pci_free_irq_vectors(hw->pdev);
|
|
hw->intr_mode = CSIO_IM_NONE;
|
|
hw->flags &= ~CSIO_HWF_HOST_INTR_ENABLED;
|
|
}
|