202 lines
4.6 KiB
C
Executable file
202 lines
4.6 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2019 MediaTek Inc.
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*/
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#ifndef _UFS_MEDIATEK_H
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#define _UFS_MEDIATEK_H
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#include <linux/bitops.h>
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#include <linux/pm_qos.h>
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#include <linux/soc/mediatek/mtk_sip_svc.h>
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#include <linux/soc/mediatek/mtk-pm-qos.h>
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#include "ufshcd.h"
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/*
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* Vendor specific UFSHCI Registers
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*/
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#define REG_UFS_REFCLK_CTRL 0x144
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#define REG_UFS_EXTREG 0x2100
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#define REG_UFS_MPHYCTRL 0x2200
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#define REG_UFS_REJECT_MON 0x22AC
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#define REG_UFS_DEBUG_SEL 0x22C0
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#define REG_UFS_PROBE 0x22C8
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/*
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* Ref-clk control
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*
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* Values for register REG_UFS_REFCLK_CTRL
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*/
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#define REFCLK_RELEASE 0x0
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#define REFCLK_REQUEST BIT(0)
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#define REFCLK_ACK BIT(1)
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#define REFCLK_REQ_TIMEOUT_US 3000
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/*
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* Vendor specific pre-defined parameters
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*/
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#define UFS_MTK_LIMIT_NUM_LANES_RX 2
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#define UFS_MTK_LIMIT_NUM_LANES_TX 2
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#define UFS_MTK_LIMIT_HSGEAR_RX UFS_HS_G4
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#define UFS_MTK_LIMIT_HSGEAR_TX UFS_HS_G4
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#define UFS_MTK_LIMIT_PWMGEAR_RX UFS_PWM_G4
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#define UFS_MTK_LIMIT_PWMGEAR_TX UFS_PWM_G4
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#define UFS_MTK_LIMIT_RX_PWR_PWM SLOW_MODE
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#define UFS_MTK_LIMIT_TX_PWR_PWM SLOW_MODE
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#define UFS_MTK_LIMIT_RX_PWR_HS FAST_MODE
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#define UFS_MTK_LIMIT_TX_PWR_HS FAST_MODE
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#define UFS_MTK_LIMIT_HS_RATE PA_HS_MODE_B
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#define UFS_MTK_LIMIT_DESIRED_MODE UFS_HS_MODE
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/*
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* Other attributes
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*/
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#define VS_DEBUGCLOCKENABLE 0xD0A1
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#define VS_SAVEPOWERCONTROL 0xD0A6
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#define VS_UNIPROPOWERDOWNCONTROL 0xD0A8
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/*
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* Vendor specific link state
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*/
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enum {
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VS_LINK_DISABLED = 0,
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VS_LINK_DOWN = 1,
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VS_LINK_UP = 2,
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VS_LINK_HIBERN8 = 3,
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VS_LINK_LOST = 4,
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VS_LINK_CFG = 5,
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};
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/*
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* SiP commands
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*/
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#define MTK_SIP_UFS_CONTROL MTK_SIP_SMC_CMD(0x276)
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#define UFS_MTK_SIP_VA09_PWR_CTRL BIT(0)
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#define UFS_MTK_SIP_DEVICE_RESET BIT(1)
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#define UFS_MTK_SIP_CRYPTO_CTRL BIT(2)
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#define UFS_MTK_SIP_REF_CLK_NOTIFICATION BIT(3)
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/*
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* Quirks
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*/
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enum ufs_mtk_host_quirks {
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/*
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* Auto-hibern8 shall be disabled while doorbell is not empty
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*/
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UFS_MTK_HOST_QUIRK_BROKEN_AUTO_HIBERN8 = BIT(0),
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/*
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* This quirk needs to be enabled if we apply performance heuristic
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* to UFS host.
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*/
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UFS_MTK_HOST_QUIRK_UFS_HCI_PERF_HEURISTIC = BIT(1),
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/*
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* This quirk needs to be enabled if VCC drop slow
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*/
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UFS_MTK_HOST_QUIRK_UFS_VCC_ALWAYS_ON = BIT(2),
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};
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/*
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* VS_DEBUGCLOCKENABLE
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*/
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enum {
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TX_SYMBOL_CLK_REQ_FORCE = 5,
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};
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/*
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* VS_SAVEPOWERCONTROL
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*/
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enum {
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RX_SYMBOL_CLK_GATE_EN = 0,
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SYS_CLK_GATE_EN = 2,
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TX_CLK_GATE_EN = 3,
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};
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/*
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* Ref-clk control mode
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*/
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enum {
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REF_CLK_SW_MODE = 0,
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REF_CLK_HALF_HW_MODE = 1,
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REF_CLK_HW_MODE = 2
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};
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/*
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* perf control mode
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*/
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enum perf_mode {
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PERF_FORCE_DISABLE = 0,
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PERF_FORCE_ENABLE = 1,
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PERF_AUTO = 2,
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};
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struct ufs_mtk_host_cfg {
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enum ufs_mtk_host_quirks quirks;
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};
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struct ufs_mtk_hw_ver {
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u8 step;
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u8 minor;
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u8 major;
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};
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struct ufs_mtk_host {
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struct ufs_mtk_host_cfg *cfg;
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struct ufs_hba *hba;
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struct phy *mphy;
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struct regulator *reg_va09;
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struct reset_control *hci_reset;
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struct reset_control *unipro_reset;
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struct reset_control *crypto_reset;
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struct ufs_mtk_hw_ver hw_ver;
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bool mphy_powered_on;
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bool unipro_lpm;
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bool ref_clk_enabled;
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bool auto_hibern_enabled;
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u16 ref_clk_ungating_wait_us;
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u16 ref_clk_gating_wait_us;
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u32 refclk_ctrl;
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bool pm_qos_init;
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struct pm_qos_request req_cpu_dma_latency;
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/* performance mode */
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enum perf_mode perf_mode;
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bool perf_enable;
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int crypto_vcore_opp;
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struct clk *crypto_clk_mux;
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struct clk *crypto_parent_clk_normal;
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struct clk *crypto_parent_clk_perf;
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struct mtk_pm_qos_request *req_vcore;
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/* vufs regulator lpm */
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bool vreg_lpm_supported;
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/*
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* RPMB device
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*/
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struct scsi_device *sdev_ufs_rpmb;
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struct rpmb_dev *rawdev_ufs_rpmb;
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struct semaphore rpmb_sem;
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bool qos_allowed;
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bool qos_enabled;
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};
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struct ufs_hba *ufs_mtk_get_hba(void);
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struct rpmb_dev *ufs_mtk_rpmb_get_raw_dev(void);
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void ufs_mtk_rpmb_add(struct ufs_hba *hba, struct scsi_device *sdev_rpmb);
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void ufs_mtk_rpmb_remove(struct ufs_hba *hba);
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void ufs_mtk_rpmb_quiesce(struct ufs_hba *hba);
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int ufs_mtk_ioctl_rpmb(struct ufs_hba *hba, const void __user *buf_user);
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bool ufs_mtk_perf_is_supported(struct ufs_mtk_host *host);
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int ufs_mtk_perf_setup_crypto_clk(struct ufs_mtk_host *host, bool perf);
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int ufs_mtk_perf_heurisic_if_allow_cmd(struct ufs_hba *hba, struct scsi_cmnd *cmd);
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void ufs_mtk_perf_heurisic_req_done(struct ufs_hba *hba, struct scsi_cmnd *cmd);
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#endif /* !_UFS_MEDIATEK_H */
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