c05564c4d8
Android 13
147 lines
3.1 KiB
C
Executable file
147 lines
3.1 KiB
C
Executable file
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/phy/phy.h>
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#include <linux/phy/mediatek/mtk_usb_phy.h>
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#include <linux/clk.h>
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#include <linux/pm_qos.h>
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#include "mtu3.h"
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#include "mtu3_priv.h"
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static struct phy *mtk_phy;
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#ifdef CONFIG_MACH_MT6885
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#define VCORE_OPP 1
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static struct pm_qos_request vcore_pm_qos;
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#endif
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#if !defined(CONFIG_USB_MU3D_DRV)
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void Charger_Detect_Init(void)
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{
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if (mtu3_cable_mode == CABLE_MODE_FORCEON) {
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pr_info("%s-, SKIP\n", __func__);
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return;
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}
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if (mtk_phy)
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usb_mtkphy_switch_to_bc11(mtk_phy, true);
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}
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void Charger_Detect_Release(void)
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{
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if (mtu3_cable_mode == CABLE_MODE_FORCEON) {
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pr_info("%s-, SKIP\n", __func__);
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return;
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}
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if (mtk_phy)
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usb_mtkphy_switch_to_bc11(mtk_phy, false);
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}
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#endif
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void usb_dpdm_pulldown(bool enable)
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{
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#ifdef CONFIG_MTK_TYPEC_WATER_DETECT
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if (mtk_phy) {
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pr_info("%s: pulldown=%d\n", __func__, enable);
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usb_mtkphy_dpdm_pulldown(mtk_phy, enable);
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}
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#endif
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}
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int ssusb_dual_phy_power_on(struct ssusb_mtk *ssusb, bool host_mode)
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{
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int ret;
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#ifdef CONFIG_MACH_MT6885
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if (host_mode) {
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if (pm_qos_request_active(&vcore_pm_qos)) {
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pm_qos_update_request(&vcore_pm_qos, VCORE_OPP);
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dev_info(ssusb->dev, "%s: Vcore QOS update %d\n", __func__,
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VCORE_OPP);
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} else {
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pm_qos_add_request(&vcore_pm_qos, PM_QOS_VCORE_OPP,
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VCORE_OPP);
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dev_info(ssusb->dev, "%s: Vcore QOS request %d\n", __func__,
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VCORE_OPP);
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}
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}
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#endif
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ret = phy_power_on(ssusb->phys[0]);
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if (host_mode) {
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if (!ret)
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usb_mtkphy_host_mode(ssusb->phys[0], true);
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}
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return ret;
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}
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void ssusb_dual_phy_power_off(struct ssusb_mtk *ssusb, bool host_mode)
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{
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#ifdef CONFIG_MACH_MT6885
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if (host_mode) {
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if (pm_qos_request_active(&vcore_pm_qos)) {
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pm_qos_remove_request(&vcore_pm_qos);
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dev_info(ssusb->dev, "%s: Vcore QOS remove\n", __func__);
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} else
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dev_info(ssusb->dev, "%s: Vcore QOS remove again\n", __func__);
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usb_mtkphy_host_mode(ssusb->phys[0], false);
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}
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#endif
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phy_power_off(ssusb->phys[0]);
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}
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bool ssusb_u3loop_back_test(struct ssusb_mtk *ssusb)
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{
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int ret;
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void __iomem *ibase = ssusb->ippc_base;
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ret = clk_prepare_enable(ssusb->sys_clk);
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if (ret) {
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dev_info(ssusb->dev, "failed to enable sys_clk\n");
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return ret;
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}
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mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL0, SSUSB_IP_SW_RST);
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mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL1, SSUSB_IP_HOST_PDN);
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mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL2, SSUSB_IP_DEV_PDN);
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mtu3_clrbits(ibase, U3D_SSUSB_IP_PW_CTRL3, SSUSB_IP_PCIE_PDN);
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mtu3_clrbits(ibase, SSUSB_U3_CTRL(0),
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(SSUSB_U3_PORT_DIS | SSUSB_U3_PORT_PDN));
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mdelay(10);
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if (usb_mtkphy_u3_loop_back_test(ssusb->phys[0]) > 0)
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ret = true;
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else
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ret = false;
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mtu3_setbits(ibase, U3D_SSUSB_IP_PW_CTRL3, SSUSB_IP_PCIE_PDN);
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clk_disable_unprepare(ssusb->sys_clk);
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return ret;
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}
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void ssusb_set_phy_mode(int speed)
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{
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/* do nothing */
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}
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void phy_hal_init(struct phy *phy)
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{
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mtk_phy = phy;
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mtu3_phy_init_debugfs(mtk_phy);
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}
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void phy_hal_exit(struct phy *phy)
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{
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mtu3_phy_exit_debugfs();
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mtk_phy = NULL;
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}
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