179 lines
4.8 KiB
C
Executable file
179 lines
4.8 KiB
C
Executable file
/*
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* skl.h - HD Audio skylake defintions.
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*
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* Copyright (C) 2015 Intel Corp
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* Author: Jeeja KP <jeeja.kp@intel.com>
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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*/
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#ifndef __SOUND_SOC_SKL_H
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#define __SOUND_SOC_SKL_H
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#include <sound/hda_register.h>
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#include <sound/hdaudio_ext.h>
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#include <sound/soc.h>
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#include "skl-nhlt.h"
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#include "skl-ssp-clk.h"
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#define SKL_SUSPEND_DELAY 2000
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#define SKL_MAX_ASTATE_CFG 3
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#define AZX_PCIREG_PGCTL 0x44
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#define AZX_PGCTL_LSRMD_MASK (1 << 4)
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#define AZX_PGCTL_ADSPPGD BIT(2)
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#define AZX_PCIREG_CGCTL 0x48
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#define AZX_CGCTL_MISCBDCGE_MASK (1 << 6)
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#define AZX_CGCTL_ADSPDCGE BIT(1)
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/* D0I3C Register fields */
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#define AZX_REG_VS_D0I3C_CIP 0x1 /* Command in progress */
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#define AZX_REG_VS_D0I3C_I3 0x4 /* D0i3 enable */
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#define SKL_MAX_DMACTRL_CFG 18
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#define DMA_CLK_CONTROLS 1
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#define DMA_TRANSMITION_START 2
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#define DMA_TRANSMITION_STOP 3
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#define AZX_REG_VS_EM2_L1SEN BIT(13)
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struct skl_dsp_resource {
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u32 max_mcps;
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u32 max_mem;
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u32 mcps;
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u32 mem;
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};
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struct skl_debug;
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struct skl_astate_param {
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u32 kcps;
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u32 clk_src;
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};
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struct skl_astate_config {
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u32 count;
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struct skl_astate_param astate_table[0];
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};
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struct skl_fw_config {
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struct skl_astate_config *astate_cfg;
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};
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struct skl {
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struct hdac_bus hbus;
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struct pci_dev *pci;
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unsigned int init_done:1; /* delayed init status */
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struct platform_device *dmic_dev;
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struct platform_device *i2s_dev;
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struct platform_device *clk_dev;
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struct snd_soc_component *component;
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struct snd_soc_dai_driver *dais;
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struct nhlt_acpi_table *nhlt; /* nhlt ptr */
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struct skl_sst *skl_sst; /* sst skl ctx */
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struct skl_dsp_resource resource;
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struct list_head ppl_list;
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struct list_head bind_list;
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const char *fw_name;
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char tplg_name[64];
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unsigned short pci_id;
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const struct firmware *tplg;
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int supend_active;
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struct work_struct probe_work;
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struct skl_debug *debugfs;
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u8 nr_modules;
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struct skl_module **modules;
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bool use_tplg_pcm;
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struct skl_fw_config cfg;
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struct snd_soc_acpi_mach *mach;
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};
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#define skl_to_bus(s) (&(s)->hbus)
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#define bus_to_skl(bus) container_of(bus, struct skl, hbus)
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/* to pass dai dma data */
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struct skl_dma_params {
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u32 format;
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u8 stream_tag;
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};
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struct skl_machine_pdata {
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u32 dmic_num;
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bool use_tplg_pcm; /* use dais and dai links from topology */
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};
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struct skl_dsp_ops {
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int id;
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unsigned int num_cores;
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struct skl_dsp_loader_ops (*loader_ops)(void);
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int (*init)(struct device *dev, void __iomem *mmio_base,
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int irq, const char *fw_name,
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struct skl_dsp_loader_ops loader_ops,
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struct skl_sst **skl_sst);
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int (*init_fw)(struct device *dev, struct skl_sst *ctx);
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void (*cleanup)(struct device *dev, struct skl_sst *ctx);
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};
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int skl_platform_unregister(struct device *dev);
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int skl_platform_register(struct device *dev);
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struct nhlt_acpi_table *skl_nhlt_init(struct device *dev);
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void skl_nhlt_free(struct nhlt_acpi_table *addr);
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struct nhlt_specific_cfg *skl_get_ep_blob(struct skl *skl, u32 instance,
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u8 link_type, u8 s_fmt, u8 no_ch,
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u32 s_rate, u8 dirn, u8 dev_type);
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int skl_get_dmic_geo(struct skl *skl);
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int skl_nhlt_update_topology_bin(struct skl *skl);
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int skl_init_dsp(struct skl *skl);
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int skl_free_dsp(struct skl *skl);
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int skl_suspend_late_dsp(struct skl *skl);
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int skl_suspend_dsp(struct skl *skl);
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int skl_resume_dsp(struct skl *skl);
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void skl_cleanup_resources(struct skl *skl);
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const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id);
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void skl_update_d0i3c(struct device *dev, bool enable);
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int skl_nhlt_create_sysfs(struct skl *skl);
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void skl_nhlt_remove_sysfs(struct skl *skl);
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void skl_get_clks(struct skl *skl, struct skl_ssp_clk *ssp_clks);
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struct skl_clk_parent_src *skl_get_parent_clk(u8 clk_id);
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int skl_dsp_set_dma_control(struct skl_sst *ctx, u32 *caps,
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u32 caps_size, u32 node_id);
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struct skl_module_cfg;
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#ifdef CONFIG_DEBUG_FS
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struct skl_debug *skl_debugfs_init(struct skl *skl);
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void skl_debug_init_module(struct skl_debug *d,
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struct snd_soc_dapm_widget *w,
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struct skl_module_cfg *mconfig);
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#else
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static inline struct skl_debug *skl_debugfs_init(struct skl *skl)
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{
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return NULL;
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}
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static inline void skl_debug_init_module(struct skl_debug *d,
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struct snd_soc_dapm_widget *w,
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struct skl_module_cfg *mconfig)
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{}
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#endif
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#endif /* __SOUND_SOC_SKL_H */
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