c05564c4d8
Android 13
642 lines
15 KiB
C
Executable file
642 lines
15 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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* Author: Michael Hsiao <michael.hsiao@mediatek.com>
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*/
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/*******************************************************************************
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*
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* Filename:
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* ---------
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* AudDrv_Gpio.c
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*
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* Project:
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* --------
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* MT6797 Audio Driver GPIO
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*
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* Description:
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* ------------
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* Audio register
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*
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* Author:
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* -------
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* George
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*
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*------------------------------------------------------------------------------
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*
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*
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******************************************************************************
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*/
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/*****************************************************************************
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* C O M P I L E R F L A G S
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*****************************************************************************/
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/*****************************************************************************
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* E X T E R N A L R E F E R E N C E S
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*****************************************************************************/
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#include "mtk-auddrv-gpio.h"
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#include <linux/gpio.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/delay.h>
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#include <linux/of.h>
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#include <linux/of_fdt.h>
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struct pinctrl *pinctrlaud;
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#define MT6755_PIN 1
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enum audio_system_gpio_type {
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GPIO_AUD_CLK_MOSI_OFF,
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GPIO_AUD_CLK_MOSI_ON,
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GPIO_AUD_DAT_MISO_OFF,
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GPIO_AUD_DAT_MISO_ON,
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GPIO_AUD_DAT_MOSI_OFF,
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GPIO_AUD_DAT_MOSI_ON,
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GPIO_AUD_DAT_MISO2_OFF,
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GPIO_AUD_DAT_MISO2_ON,
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GPIO_AUD_DAT_MOSI2_OFF,
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GPIO_AUD_DAT_MOSI2_ON,
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GPIO_VOW_DAT_MISO_OFF,
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GPIO_VOW_DAT_MISO_ON,
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GPIO_VOW_CLK_MISO_OFF,
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GPIO_VOW_CLK_MISO_ON,
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GPIO_SMARTPA_RESET,
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GPIO_SMARTPA_ON,
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GPIO_SMARTPA_OFF,
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GPIO_TDM_MODE0,
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GPIO_TDM_MODE1,
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#if MT6755_PIN
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/* GPIO_DEFAULT, */
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GPIO_PMIC_MODE0,
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GPIO_PMIC_MODE1,
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GPIO_I2S_MODE0,
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GPIO_I2S_MODE1,
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GPIO_EXTAMP_HIGH,
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GPIO_EXTAMP_LOW,
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GPIO_EXTAMP2_HIGH,
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GPIO_EXTAMP2_LOW,
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GPIO_RCVSPK_HIGH,
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GPIO_RCVSPK_LOW,
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#endif
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GPIO_HPDEPOP_HIGH,
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GPIO_HPDEPOP_LOW,
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GPIO_AUD_CLK_MOSI_HIGH,
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GPIO_AUD_CLK_MOSI_LOW,
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GPIO_NUM
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};
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struct audio_gpio_attr {
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const char *name;
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bool gpio_prepare;
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struct pinctrl_state *gpioctrl;
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};
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static struct audio_gpio_attr aud_gpios[GPIO_NUM] = {
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[GPIO_AUD_CLK_MOSI_OFF] = {"aud_clk_mosi_off", false, NULL},
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[GPIO_AUD_CLK_MOSI_ON] = {"aud_clk_mosi_on", false, NULL},
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[GPIO_AUD_DAT_MISO_OFF] = {"aud_dat_miso_off", false, NULL},
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[GPIO_AUD_DAT_MISO_ON] = {"aud_dat_miso_on", false, NULL},
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[GPIO_AUD_DAT_MOSI_OFF] = {"aud_dat_mosi_off", false, NULL},
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[GPIO_AUD_DAT_MOSI_ON] = {"aud_dat_mosi_on", false, NULL},
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[GPIO_AUD_DAT_MISO2_OFF] = {"aud_dat_miso2_off", false, NULL},
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[GPIO_AUD_DAT_MISO2_ON] = {"aud_dat_miso2_on", false, NULL},
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[GPIO_AUD_DAT_MOSI2_OFF] = {"aud_dat_mosi2_off", false, NULL},
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[GPIO_AUD_DAT_MOSI2_ON] = {"aud_dat_mosi2_on", false, NULL},
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[GPIO_VOW_DAT_MISO_OFF] = {"vow_dat_miso_off", false, NULL},
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[GPIO_VOW_DAT_MISO_ON] = {"vow_dat_miso_on", false, NULL},
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[GPIO_VOW_CLK_MISO_OFF] = {"vow_clk_miso_off", false, NULL},
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[GPIO_VOW_CLK_MISO_ON] = {"vow_clk_miso_on", false, NULL},
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[GPIO_SMARTPA_RESET] = {"aud_smartpa_reset", false, NULL},
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[GPIO_SMARTPA_ON] = {"aud_smartpa_on", false, NULL},
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[GPIO_SMARTPA_OFF] = {"aud_smartpa_off", false, NULL},
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[GPIO_TDM_MODE0] = {"aud_tdm_mode0", false, NULL},
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[GPIO_TDM_MODE1] = {"aud_tdm_mode1", false, NULL},
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#if MT6755_PIN
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/* [GPIO_DEFAULT] = {"default", false, NULL}, */
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[GPIO_PMIC_MODE0] = {"audpmicclk-mode0", false, NULL},
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[GPIO_PMIC_MODE1] = {"audpmicclk-mode1", false, NULL},
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[GPIO_I2S_MODE0] = {"audi2s1-mode0", false, NULL},
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[GPIO_I2S_MODE1] = {"audi2s1-mode1", false, NULL},
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[GPIO_EXTAMP_HIGH] = {"extamp-pullhigh", false, NULL},
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[GPIO_EXTAMP_LOW] = {"extamp-pulllow", false, NULL},
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[GPIO_EXTAMP2_HIGH] = {"extamp2-pullhigh", false, NULL},
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[GPIO_EXTAMP2_LOW] = {"extamp2-pulllow", false, NULL},
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[GPIO_RCVSPK_HIGH] = {"rcvspk-pullhigh", false, NULL},
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[GPIO_RCVSPK_LOW] = {"rcvspk-pulllow", false, NULL},
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#endif
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[GPIO_HPDEPOP_HIGH] = {"hpdepop-pullhigh", false, NULL},
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[GPIO_HPDEPOP_LOW] = {"hpdepop-pulllow", false, NULL},
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[GPIO_AUD_CLK_MOSI_HIGH] = {"aud_clk_mosi_pull_high", false,
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NULL
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},
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[GPIO_AUD_CLK_MOSI_LOW] = {"aud_clk_mosi_pull_low", false,
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NULL
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},
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};
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static unsigned int extbuck_fan53526_exist;
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static DEFINE_MUTEX(gpio_request_mutex);
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void AudDrv_GPIO_probe(void *dev)
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{
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int ret;
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int i = 0;
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pr_debug("%s\n", __func__);
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pinctrlaud = devm_pinctrl_get(dev);
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if (IS_ERR(pinctrlaud)) {
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ret = PTR_ERR(pinctrlaud);
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pr_err("Cannot find pinctrlaud!\n");
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return;
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}
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/* update hpdepop gpio by PCB version - extbuck fan53526 use gpio111
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* which may be used by hpdepop
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*/
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pr_debug("%s(), extbuck_fan53526_exist = %d\n", __func__,
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extbuck_fan53526_exist);
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if (extbuck_fan53526_exist) { /* is e2 */
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struct audio_gpio_attr gpio_hpdepop_high = {
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"hpdepop-pullhigh_e2", false, NULL
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};
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struct audio_gpio_attr gpio_hpdepop_low = {"hpdepop-pulllow_e2",
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false, NULL
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};
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aud_gpios[GPIO_HPDEPOP_HIGH] = gpio_hpdepop_high;
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aud_gpios[GPIO_HPDEPOP_LOW] = gpio_hpdepop_low;
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pr_debug("%s(), e2 PCB, update gpio name, high = %s, low = %s\n",
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__func__, aud_gpios[GPIO_HPDEPOP_HIGH].name,
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aud_gpios[GPIO_HPDEPOP_LOW].name);
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}
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for (i = 0; i < ARRAY_SIZE(aud_gpios); i++) {
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aud_gpios[i].gpioctrl =
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pinctrl_lookup_state(pinctrlaud, aud_gpios[i].name);
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if (IS_ERR(aud_gpios[i].gpioctrl)) {
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ret = PTR_ERR(aud_gpios[i].gpioctrl);
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pr_err("%s pinctrl_lookup_state %s fail %d\n", __func__,
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aud_gpios[i].name, ret);
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} else {
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aud_gpios[i].gpio_prepare = true;
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}
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}
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}
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static int AudDrv_GPIO_Select(enum audio_system_gpio_type _type)
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{
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#ifndef CONFIG_FPGA_EARLY_PORTING
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int ret = 0;
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if (_type < 0 || _type >= GPIO_NUM) {
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pr_err("%s(), error, invaild gpio type %d\n", __func__, _type);
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return -EINVAL;
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}
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if (!aud_gpios[_type].gpio_prepare) {
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pr_err("%s(), error, gpio type %d not prepared\n", __func__,
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_type);
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return -EIO;
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}
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ret = pinctrl_select_state(pinctrlaud, aud_gpios[_type].gpioctrl);
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if (ret) {
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pr_err("%s(), error, can not set gpio type %d\n", __func__,
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_type);
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}
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return ret;
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#else
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return 0;
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#endif
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}
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static bool AudDrv_GPIO_IsValid(enum audio_system_gpio_type _type)
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{
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#ifndef CONFIG_FPGA_EARLY_PORTING
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if (_type < 0 || _type >= GPIO_NUM)
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return false;
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if (!aud_gpios[_type].gpio_prepare)
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return false;
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return true;
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#else
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return true;
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#endif
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}
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static int set_aud_clk_mosi(bool _enable)
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{
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/*
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* scp also need this gpio on mt6797,
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* don't switch gpio if they exist.
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*/
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#ifndef CONFIG_MTK_TINYSYS_SCP_SUPPORT
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static int aud_clk_mosi_counter;
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if (_enable) {
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aud_clk_mosi_counter++;
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if (aud_clk_mosi_counter == 1)
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return AudDrv_GPIO_Select(GPIO_AUD_CLK_MOSI_ON);
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} else {
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if (aud_clk_mosi_counter > 0) {
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aud_clk_mosi_counter--;
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} else {
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aud_clk_mosi_counter = 0;
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pr_info("%s(), counter %d <= 0\n", __func__,
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aud_clk_mosi_counter);
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}
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if (aud_clk_mosi_counter == 0)
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return AudDrv_GPIO_Select(GPIO_AUD_CLK_MOSI_OFF);
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}
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#endif
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return 0;
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}
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static int set_aud_dat_mosi(bool _enable)
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{
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if (_enable)
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return AudDrv_GPIO_Select(GPIO_AUD_DAT_MOSI_ON);
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else
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return AudDrv_GPIO_Select(GPIO_AUD_DAT_MOSI_OFF);
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}
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static int set_aud_dat_miso(bool _enable, enum soc_aud_digital_block _usage)
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{
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static bool adda_enable;
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static bool vow_enable;
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switch (_usage) {
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case Soc_Aud_Digital_Block_ADDA_UL:
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adda_enable = _enable;
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break;
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case Soc_Aud_Digital_Block_ADDA_VOW:
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vow_enable = _enable;
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break;
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default:
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return -EINVAL;
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}
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if (vow_enable)
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return AudDrv_GPIO_Select(GPIO_VOW_DAT_MISO_ON);
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else if (adda_enable)
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return AudDrv_GPIO_Select(GPIO_AUD_DAT_MISO_ON);
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else
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return AudDrv_GPIO_Select(GPIO_AUD_DAT_MISO_OFF);
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}
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static int set_aud_dat_mosi2(bool _enable)
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{
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if (_enable)
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return AudDrv_GPIO_Select(GPIO_AUD_DAT_MOSI2_ON);
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else
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return AudDrv_GPIO_Select(GPIO_AUD_DAT_MOSI2_OFF);
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}
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static int set_aud_dat_miso2(bool _enable)
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{
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if (_enable)
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return AudDrv_GPIO_Select(GPIO_AUD_DAT_MISO2_ON);
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else
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return AudDrv_GPIO_Select(GPIO_AUD_DAT_MISO2_OFF);
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}
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static int set_vow_clk_miso(bool _enable)
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{
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if (_enable)
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return AudDrv_GPIO_Select(GPIO_VOW_CLK_MISO_ON);
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else
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return AudDrv_GPIO_Select(GPIO_VOW_CLK_MISO_OFF);
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}
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int AudDrv_GPIO_Request(bool _enable, enum soc_aud_digital_block _usage)
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{
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mutex_lock(&gpio_request_mutex);
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switch (_usage) {
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case Soc_Aud_Digital_Block_ADDA_DL:
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set_aud_clk_mosi(_enable);
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set_aud_dat_mosi(_enable);
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break;
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case Soc_Aud_Digital_Block_ADDA_UL:
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set_aud_clk_mosi(_enable);
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set_aud_dat_miso(_enable, _usage);
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break;
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case Soc_Aud_Digital_Block_ADDA_UL2:
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set_aud_clk_mosi(_enable);
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set_aud_dat_miso2(_enable);
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break;
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case Soc_Aud_Digital_Block_ADDA_VOW:
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set_vow_clk_miso(_enable);
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set_aud_dat_miso(_enable, _usage);
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break;
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case Soc_Aud_Digital_Block_ADDA_ANC:
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set_aud_clk_mosi(_enable);
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set_aud_dat_miso2(_enable);
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set_aud_dat_mosi2(_enable);
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break;
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case Soc_Aud_Digital_Block_ADDA_ALL:
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set_aud_clk_mosi(_enable);
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set_aud_dat_mosi(_enable);
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set_aud_dat_mosi2(_enable);
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set_aud_dat_miso(_enable, Soc_Aud_Digital_Block_ADDA_UL);
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set_aud_dat_miso2(_enable);
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break;
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default:
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mutex_unlock(&gpio_request_mutex);
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return -EINVAL;
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}
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mutex_unlock(&gpio_request_mutex);
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return 0;
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}
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int AudDrv_GPIO_SMARTPA_Select(int mode)
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{
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int retval = 0;
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mutex_lock(&gpio_request_mutex);
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switch (mode) {
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case 0:
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if (AudDrv_GPIO_IsValid(GPIO_SMARTPA_OFF))
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retval = AudDrv_GPIO_Select(GPIO_SMARTPA_OFF);
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break;
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case 1:
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if (AudDrv_GPIO_IsValid(GPIO_SMARTPA_ON))
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retval = AudDrv_GPIO_Select(GPIO_SMARTPA_ON);
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break;
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default:
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pr_err("%s(), invalid mode = %d", __func__, mode);
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retval = -1;
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}
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mutex_unlock(&gpio_request_mutex);
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return retval;
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}
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int AudDrv_GPIO_TDM_Select(int mode)
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{
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int retval = 0;
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mutex_lock(&gpio_request_mutex);
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switch (mode) {
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case 0:
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AudDrv_GPIO_Select(GPIO_TDM_MODE0);
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break;
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case 1:
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AudDrv_GPIO_Select(GPIO_TDM_MODE1);
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break;
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default:
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pr_err("%s(), invalid mode = %d", __func__, mode);
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retval = -1;
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}
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mutex_unlock(&gpio_request_mutex);
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return retval;
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}
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int AudDrv_GPIO_PMIC_Select(int bEnable)
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{
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int retval = 0;
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#if MT6755_PIN
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mutex_lock(&gpio_request_mutex);
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if (bEnable == 1) {
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if (aud_gpios[GPIO_PMIC_MODE1].gpio_prepare) {
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retval = pinctrl_select_state(
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pinctrlaud,
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aud_gpios[GPIO_PMIC_MODE1].gpioctrl);
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if (retval)
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pr_info("could not set aud_gpios[GPIO_PMIC_MODE1] pins\n");
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}
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} else {
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if (aud_gpios[GPIO_PMIC_MODE0].gpio_prepare) {
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retval = pinctrl_select_state(
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pinctrlaud,
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aud_gpios[GPIO_PMIC_MODE0].gpioctrl);
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if (retval)
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pr_info("could not set aud_gpios[GPIO_PMIC_MODE0] pins\n");
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}
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}
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mutex_unlock(&gpio_request_mutex);
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#endif
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return retval;
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}
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int AudDrv_GPIO_I2S_Select(int bEnable)
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{
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int retval = 0;
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mutex_lock(&gpio_request_mutex);
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#if MT6755_PIN
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if (bEnable == 1) {
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if (aud_gpios[GPIO_I2S_MODE1].gpio_prepare) {
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retval = pinctrl_select_state(
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pinctrlaud, aud_gpios[GPIO_I2S_MODE1].gpioctrl);
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if (retval)
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pr_info("could not set aud_gpios[GPIO_I2S_MODE1] pins\n");
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}
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} else {
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if (aud_gpios[GPIO_I2S_MODE0].gpio_prepare) {
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retval = pinctrl_select_state(
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pinctrlaud, aud_gpios[GPIO_I2S_MODE0].gpioctrl);
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if (retval)
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pr_info("could not set aud_gpios[GPIO_I2S_MODE0] pins\n");
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}
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}
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#endif
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mutex_unlock(&gpio_request_mutex);
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return retval;
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}
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int AudDrv_GPIO_EXTAMP_Select(int bEnable, int mode)
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{
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int retval = 0;
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#if MT6755_PIN
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int extamp_mode;
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int i;
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mutex_lock(&gpio_request_mutex);
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if (bEnable == 1) {
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if (mode == 1)
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extamp_mode = 1;
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else if (mode == 2)
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extamp_mode = 2;
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else
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extamp_mode = 3; /* default mode is 3 */
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if (aud_gpios[GPIO_EXTAMP_HIGH].gpio_prepare) {
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for (i = 0; i < extamp_mode; i++) {
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retval = pinctrl_select_state(
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pinctrlaud,
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aud_gpios[GPIO_EXTAMP_LOW].gpioctrl);
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if (retval)
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pr_info("could not set aud_gpios[GPIO_EXTAMP_LOW] pins\n");
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udelay(2);
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retval = pinctrl_select_state(
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pinctrlaud,
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aud_gpios[GPIO_EXTAMP_HIGH].gpioctrl);
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|
if (retval)
|
|
pr_info("could not set aud_gpios[GPIO_EXTAMP_HIGH] pins\n");
|
|
udelay(2);
|
|
}
|
|
}
|
|
} else {
|
|
if (aud_gpios[GPIO_EXTAMP_LOW].gpio_prepare) {
|
|
retval = pinctrl_select_state(
|
|
pinctrlaud,
|
|
aud_gpios[GPIO_EXTAMP_LOW].gpioctrl);
|
|
if (retval)
|
|
pr_info("could not set aud_gpios[GPIO_EXTAMP_LOW] pins\n");
|
|
}
|
|
}
|
|
mutex_unlock(&gpio_request_mutex);
|
|
#endif
|
|
return retval;
|
|
}
|
|
|
|
int AudDrv_GPIO_EXTAMP2_Select(int bEnable, int mode)
|
|
{
|
|
int retval = 0;
|
|
|
|
#if MT6755_PIN
|
|
int extamp_mode;
|
|
int i;
|
|
|
|
mutex_lock(&gpio_request_mutex);
|
|
if (bEnable == 1) {
|
|
if (mode == 1)
|
|
extamp_mode = 1;
|
|
else if (mode == 2)
|
|
extamp_mode = 2;
|
|
else
|
|
extamp_mode = 3; /* default mode is 3 */
|
|
|
|
if (aud_gpios[GPIO_EXTAMP2_HIGH].gpio_prepare) {
|
|
for (i = 0; i < extamp_mode; i++) {
|
|
retval = pinctrl_select_state(
|
|
pinctrlaud,
|
|
aud_gpios[GPIO_EXTAMP2_LOW].gpioctrl);
|
|
if (retval)
|
|
pr_info("could not set aud_gpios[GPIO_EXTAMP2_LOW] pins\n");
|
|
udelay(2);
|
|
retval = pinctrl_select_state(
|
|
pinctrlaud,
|
|
aud_gpios[GPIO_EXTAMP2_HIGH].gpioctrl);
|
|
if (retval)
|
|
pr_info("could not set aud_gpios[GPIO_EXTAMP2_HIGH] pins\n");
|
|
udelay(2);
|
|
}
|
|
}
|
|
} else {
|
|
if (aud_gpios[GPIO_EXTAMP2_LOW].gpio_prepare) {
|
|
retval = pinctrl_select_state(
|
|
pinctrlaud,
|
|
aud_gpios[GPIO_EXTAMP2_LOW].gpioctrl);
|
|
if (retval)
|
|
pr_info("could not set aud_gpios[GPIO_EXTAMP2_LOW] pins\n");
|
|
}
|
|
}
|
|
mutex_unlock(&gpio_request_mutex);
|
|
#endif
|
|
return retval;
|
|
}
|
|
|
|
int AudDrv_GPIO_RCVSPK_Select(int bEnable)
|
|
{
|
|
int retval = 0;
|
|
|
|
#if MT6755_PIN
|
|
mutex_lock(&gpio_request_mutex);
|
|
if (bEnable == 1) {
|
|
if (aud_gpios[GPIO_RCVSPK_HIGH].gpio_prepare) {
|
|
retval = pinctrl_select_state(
|
|
pinctrlaud,
|
|
aud_gpios[GPIO_RCVSPK_HIGH].gpioctrl);
|
|
if (retval)
|
|
pr_info("could not set aud_gpios[GPIO_RCVSPK_HIGH] pins\n");
|
|
}
|
|
} else {
|
|
if (aud_gpios[GPIO_RCVSPK_LOW].gpio_prepare) {
|
|
retval = pinctrl_select_state(
|
|
pinctrlaud,
|
|
aud_gpios[GPIO_RCVSPK_LOW].gpioctrl);
|
|
if (retval)
|
|
pr_info("could not set aud_gpios[GPIO_RCVSPK_LOW] pins\n");
|
|
}
|
|
}
|
|
mutex_unlock(&gpio_request_mutex);
|
|
#endif
|
|
return retval;
|
|
}
|
|
|
|
int AudDrv_GPIO_HPDEPOP_Select(int bEnable)
|
|
{
|
|
int retval = 0;
|
|
|
|
mutex_lock(&gpio_request_mutex);
|
|
if (bEnable == 1)
|
|
AudDrv_GPIO_Select(GPIO_HPDEPOP_LOW);
|
|
else
|
|
AudDrv_GPIO_Select(GPIO_HPDEPOP_HIGH);
|
|
mutex_unlock(&gpio_request_mutex);
|
|
return retval;
|
|
}
|
|
|
|
int audio_drv_gpio_aud_clk_pull(bool high)
|
|
{
|
|
int retval = 0;
|
|
|
|
mutex_lock(&gpio_request_mutex);
|
|
pr_debug("%s, high = %d\n", __func__, high);
|
|
|
|
if (high == 1)
|
|
AudDrv_GPIO_Select(GPIO_AUD_CLK_MOSI_HIGH);
|
|
else
|
|
AudDrv_GPIO_Select(GPIO_AUD_CLK_MOSI_LOW);
|
|
mutex_unlock(&gpio_request_mutex);
|
|
return retval;
|
|
}
|
|
|
|
static int __init dt_get_extbuck_info(unsigned long node, const char *uname,
|
|
int depth, void *data)
|
|
{
|
|
struct devinfo_extbuck_tag {
|
|
u32 size;
|
|
u32 tag;
|
|
u32 extbuck_fan53526_exist;
|
|
} *tags;
|
|
unsigned int size = 0;
|
|
|
|
if (depth != 1 ||
|
|
(strcmp(uname, "chosen") != 0 && strcmp(uname, "chosen@0") != 0))
|
|
return 0;
|
|
|
|
tags = (struct devinfo_extbuck_tag *)of_get_flat_dt_prop(
|
|
node, "atag,extbuck_fan53526", &size);
|
|
|
|
if (tags) {
|
|
extbuck_fan53526_exist = tags->extbuck_fan53526_exist;
|
|
pr_info("[%s] fan53526_exist = %d\n", __func__,
|
|
extbuck_fan53526_exist);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int __init audio_drv_gpio_init(void)
|
|
{
|
|
of_scan_flat_dt(dt_get_extbuck_info, NULL);
|
|
|
|
return 0;
|
|
}
|
|
arch_initcall(audio_drv_gpio_init);
|