124 lines
3.3 KiB
C
Executable file
124 lines
3.3 KiB
C
Executable file
// SPDX-License-Identifier: GPL-2.0
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//
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// mt6797-afe-clk.c -- Mediatek 6797 afe clock ctrl
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//
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// Copyright (c) 2018 MediaTek Inc.
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// Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
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#include <linux/clk.h>
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#include "mt6797-afe-common.h"
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#include "mt6797-afe-clk.h"
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enum {
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CLK_INFRA_SYS_AUD,
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CLK_INFRA_SYS_AUD_26M,
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CLK_TOP_MUX_AUD,
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CLK_TOP_MUX_AUD_BUS,
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CLK_TOP_SYSPLL3_D4,
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CLK_TOP_SYSPLL1_D4,
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CLK_CLK26M,
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CLK_NUM
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};
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static const char *aud_clks[CLK_NUM] = {
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[CLK_INFRA_SYS_AUD] = "infra_sys_audio_clk",
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[CLK_INFRA_SYS_AUD_26M] = "infra_sys_audio_26m",
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[CLK_TOP_MUX_AUD] = "top_mux_audio",
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[CLK_TOP_MUX_AUD_BUS] = "top_mux_aud_intbus",
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[CLK_TOP_SYSPLL3_D4] = "top_sys_pll3_d4",
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[CLK_TOP_SYSPLL1_D4] = "top_sys_pll1_d4",
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[CLK_CLK26M] = "top_clk26m_clk",
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};
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int mt6797_init_clock(struct mtk_base_afe *afe)
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{
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struct mt6797_afe_private *afe_priv = afe->platform_priv;
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int i;
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afe_priv->clk = devm_kcalloc(afe->dev, CLK_NUM, sizeof(*afe_priv->clk),
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GFP_KERNEL);
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if (!afe_priv->clk)
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return -ENOMEM;
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for (i = 0; i < CLK_NUM; i++) {
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afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]);
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if (IS_ERR(afe_priv->clk[i])) {
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dev_err(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n",
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__func__, aud_clks[i],
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PTR_ERR(afe_priv->clk[i]));
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return PTR_ERR(afe_priv->clk[i]);
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}
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}
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return 0;
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}
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int mt6797_afe_enable_clock(struct mtk_base_afe *afe)
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{
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struct mt6797_afe_private *afe_priv = afe->platform_priv;
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int ret;
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ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD]);
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if (ret) {
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dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
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__func__, aud_clks[CLK_INFRA_SYS_AUD], ret);
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goto CLK_INFRA_SYS_AUDIO_ERR;
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}
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ret = clk_prepare_enable(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);
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if (ret) {
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dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
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__func__, aud_clks[CLK_INFRA_SYS_AUD_26M], ret);
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goto CLK_INFRA_SYS_AUD_26M_ERR;
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}
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ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD]);
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if (ret) {
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dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
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__func__, aud_clks[CLK_TOP_MUX_AUD], ret);
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goto CLK_MUX_AUDIO_ERR;
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}
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ret = clk_set_parent(afe_priv->clk[CLK_TOP_MUX_AUD],
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afe_priv->clk[CLK_CLK26M]);
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if (ret) {
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dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",
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__func__, aud_clks[CLK_TOP_MUX_AUD],
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aud_clks[CLK_CLK26M], ret);
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goto CLK_MUX_AUDIO_ERR;
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}
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ret = clk_prepare_enable(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);
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if (ret) {
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dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
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__func__, aud_clks[CLK_TOP_MUX_AUD_BUS], ret);
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goto CLK_MUX_AUDIO_INTBUS_ERR;
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}
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return ret;
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CLK_MUX_AUDIO_INTBUS_ERR:
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clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);
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CLK_MUX_AUDIO_ERR:
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clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]);
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CLK_INFRA_SYS_AUD_26M_ERR:
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clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);
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CLK_INFRA_SYS_AUDIO_ERR:
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clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD]);
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return 0;
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}
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int mt6797_afe_disable_clock(struct mtk_base_afe *afe)
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{
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struct mt6797_afe_private *afe_priv = afe->platform_priv;
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clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD_BUS]);
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clk_disable_unprepare(afe_priv->clk[CLK_TOP_MUX_AUD]);
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clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD_26M]);
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clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUD]);
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return 0;
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}
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