74 lines
1.6 KiB
C
74 lines
1.6 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#include <linux/kernel.h>
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#include <linux/arm-smccc.h>
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#include <linux/soc/mediatek/mtk_sip_svc.h>
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#include <mt-plat/mtk_devinfo.h>
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#include <mtk_dramc.h>
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#define MTK_SIP_VCOREFS_SET_FREQ 16
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#define NUM_DRAM_OPP 3
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static int __init dvfsrc_opp_init(void)
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{
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#if IS_ENABLED(CONFIG_MTK_DRAMC_LEGACY)
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int i;
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struct arm_smccc_res ares;
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for (i = 0; i < NUM_DRAM_OPP; i++) {
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arm_smccc_smc(MTK_SIP_VCOREFS_CONTROL,
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MTK_SIP_VCOREFS_SET_FREQ,
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i, dram_steps_freq(i), 0, 0, 0, 0,
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&ares);
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}
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#endif
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return 0;
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}
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fs_initcall_sync(dvfsrc_opp_init);
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enum {
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SPMFW_LP4_2CH_3200 = 0,
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SPMFW_LP4X_2CH_3200,
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SPMFW_LP3_1CH_1866,
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SPMFW_LP4_2CH_2400,
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SPMFW_LP4X_2CH_2400,
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};
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static int __init spmfw_init(void)
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{
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struct arm_smccc_res ares;
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int spmfw_idx = -1;
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int ddr_type;
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int ddr_hz;
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#if IS_ENABLED(CONFIG_MTK_DRAMC_LEGACY)
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ddr_type = get_ddr_type();
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ddr_hz = dram_steps_freq(0);
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if (ddr_type == TYPE_LPDDR4 && ddr_hz == 2400)
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spmfw_idx = SPMFW_LP4_2CH_2400;
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else if (ddr_type == TYPE_LPDDR4 && ddr_hz == 3200)
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spmfw_idx = SPMFW_LP4_2CH_3200;
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else if (ddr_type == TYPE_LPDDR4X && ddr_hz == 3200)
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spmfw_idx = SPMFW_LP4X_2CH_3200;
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else if (ddr_type == TYPE_LPDDR4X && ddr_hz == 2400)
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spmfw_idx = SPMFW_LP4X_2CH_2400;
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else if (ddr_type == TYPE_LPDDR3)
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spmfw_idx = SPMFW_LP3_1CH_1866;
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pr_info("#@# %s(%d) __spmfw_idx 0x%x, ddr=[%d][%d]\n",
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__func__, __LINE__, spmfw_idx, ddr_type, ddr_hz);
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arm_smccc_smc(MTK_SIP_KERNEL_SPM_ARGS, 0,
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spmfw_idx, 0, 0, 0, 0, 0,
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&ares);
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#endif
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return 0;
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}
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fs_initcall_sync(spmfw_init);
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