29 lines
1.1 KiB
Plaintext
29 lines
1.1 KiB
Plaintext
Spreadtrum GPIO controller bindings
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The controller's registers are organized as sets of sixteen 16-bit
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registers with each set controlling a bank of up to 16 pins. A single
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interrupt is shared for all of the banks handled by the controller.
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Required properties:
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- compatible: Should be "sprd,sc9860-gpio".
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- reg: Define the base and range of the I/O address space containing
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the GPIO controller registers.
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- gpio-controller: Marks the device node as a GPIO controller.
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- #gpio-cells: Should be <2>. The first cell is the gpio number and
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the second cell is used to specify optional parameters.
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- interrupt-controller: Marks the device node as an interrupt controller.
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- #interrupt-cells: Should be <2>. Specifies the number of cells needed
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to encode interrupt source.
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- interrupts: Should be the port interrupt shared by all the gpios.
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Example:
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ap_gpio: gpio@40280000 {
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compatible = "sprd,sc9860-gpio";
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reg = <0 0x40280000 0 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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};
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