166 lines
5.1 KiB
C
166 lines
5.1 KiB
C
/*
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*
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* BRIEF MODULE DESCRIPTION
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* IT8172 IDE controller support
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*
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* Copyright (C) 2000 MontaVista Software Inc.
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* Copyright (C) 2008 Shane McDonald
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/ioport.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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#include <linux/init.h>
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#define DRV_NAME "IT8172"
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static void it8172_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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u16 drive_enables;
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u32 drive_timing;
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const u8 pio = drive->pio_mode - XFER_PIO_0;
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/*
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* The highest value of DIOR/DIOW pulse width and recovery time
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* that can be set in the IT8172 is 8 PCI clock cycles. As a result,
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* it cannot be configured for PIO mode 0. This table sets these
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* parameters to the maximum supported by the IT8172.
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*/
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static const u8 timings[] = { 0x3f, 0x3c, 0x1b, 0x12, 0x0a };
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pci_read_config_word(dev, 0x40, &drive_enables);
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pci_read_config_dword(dev, 0x44, &drive_timing);
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/*
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* Enable port 0x44. The IT8172 spec is confused; it calls
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* this register the "Slave IDE Timing Register", but in fact,
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* it controls timing for both master and slave drives.
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*/
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drive_enables |= 0x4000;
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drive_enables &= drive->dn ? 0xc006 : 0xc060;
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if (drive->media == ide_disk)
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/* enable prefetch */
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drive_enables |= 0x0004 << (drive->dn * 4);
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if (ide_pio_need_iordy(drive, pio))
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/* enable IORDY sample-point */
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drive_enables |= 0x0002 << (drive->dn * 4);
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drive_timing &= drive->dn ? 0x00003f00 : 0x000fc000;
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drive_timing |= timings[pio] << (drive->dn * 6 + 8);
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pci_write_config_word(dev, 0x40, drive_enables);
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pci_write_config_dword(dev, 0x44, drive_timing);
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}
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static void it8172_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
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{
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struct pci_dev *dev = to_pci_dev(hwif->dev);
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int a_speed = 3 << (drive->dn * 4);
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int u_flag = 1 << drive->dn;
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int u_speed = 0;
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u8 reg48, reg4a;
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const u8 speed = drive->dma_mode;
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pci_read_config_byte(dev, 0x48, ®48);
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pci_read_config_byte(dev, 0x4a, ®4a);
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if (speed >= XFER_UDMA_0) {
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u8 udma = speed - XFER_UDMA_0;
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u_speed = udma << (drive->dn * 4);
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pci_write_config_byte(dev, 0x48, reg48 | u_flag);
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reg4a &= ~a_speed;
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pci_write_config_byte(dev, 0x4a, reg4a | u_speed);
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} else {
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const u8 mwdma_to_pio[] = { 0, 3, 4 };
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pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
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pci_write_config_byte(dev, 0x4a, reg4a & ~a_speed);
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drive->pio_mode =
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mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
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it8172_set_pio_mode(hwif, drive);
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}
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}
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static const struct ide_port_ops it8172_port_ops = {
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.set_pio_mode = it8172_set_pio_mode,
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.set_dma_mode = it8172_set_dma_mode,
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};
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static const struct ide_port_info it8172_port_info = {
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.name = DRV_NAME,
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.port_ops = &it8172_port_ops,
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.enablebits = { {0x41, 0x80, 0x80}, {0x00, 0x00, 0x00} },
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.host_flags = IDE_HFLAG_SINGLE,
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.pio_mask = ATA_PIO4 & ~ATA_PIO0,
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.mwdma_mask = ATA_MWDMA2,
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.udma_mask = ATA_UDMA2,
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};
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static int it8172_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
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return -ENODEV; /* IT8172 is more than an IDE controller */
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return ide_pci_init_one(dev, &it8172_port_info, NULL);
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}
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static struct pci_device_id it8172_pci_tbl[] = {
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{ PCI_VDEVICE(ITE, PCI_DEVICE_ID_ITE_8172), 0 },
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, it8172_pci_tbl);
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static struct pci_driver it8172_pci_driver = {
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.name = "IT8172_IDE",
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.id_table = it8172_pci_tbl,
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.probe = it8172_init_one,
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.remove = ide_pci_remove,
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.suspend = ide_pci_suspend,
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.resume = ide_pci_resume,
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};
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static int __init it8172_ide_init(void)
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{
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return ide_pci_register_driver(&it8172_pci_driver);
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}
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static void __exit it8172_ide_exit(void)
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{
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pci_unregister_driver(&it8172_pci_driver);
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}
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module_init(it8172_ide_init);
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module_exit(it8172_ide_exit);
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MODULE_AUTHOR("Steve Longerbeam");
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MODULE_DESCRIPTION("PCI driver module for ITE 8172 IDE");
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MODULE_LICENSE("GPL");
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