208 lines
6 KiB
C
208 lines
6 KiB
C
/* bnx2x_dcb.h: QLogic Everest network driver.
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*
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* Copyright 2009-2013 Broadcom Corporation
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* Copyright 2014 QLogic Corporation
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* All rights reserved
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*
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* Unless you and QLogic execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2, available
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* at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other QLogic software provided under a
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* license other than the GPL, without QLogic's express prior written
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* consent.
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*
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* Maintained by: Ariel Elior <ariel.elior@qlogic.com>
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* Written by: Dmitry Kravkov
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*
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*/
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#ifndef BNX2X_DCB_H
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#define BNX2X_DCB_H
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#include "bnx2x_hsi.h"
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#define LLFC_DRIVER_TRAFFIC_TYPE_MAX 3 /* NW, iSCSI, FCoE */
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struct bnx2x_dcbx_app_params {
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u32 enabled;
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u32 traffic_type_priority[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
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};
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#define DCBX_COS_MAX_NUM_E2 DCBX_E2E3_MAX_NUM_COS
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/* bnx2x currently limits numbers of supported COSes to 3 to be extended to 6 */
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#define BNX2X_MAX_COS_SUPPORT 3
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#define DCBX_COS_MAX_NUM_E3B0 BNX2X_MAX_COS_SUPPORT
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#define DCBX_COS_MAX_NUM BNX2X_MAX_COS_SUPPORT
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struct bnx2x_dcbx_cos_params {
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u32 bw_tbl;
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u32 pri_bitmask;
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/*
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* strict priority: valid values are 0..5; 0 is highest priority.
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* There can't be two COSes with the same priority.
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*/
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u8 strict;
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#define BNX2X_DCBX_STRICT_INVALID DCBX_COS_MAX_NUM
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#define BNX2X_DCBX_STRICT_COS_HIGHEST 0
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#define BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(sp) ((sp) + 1)
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u8 pauseable;
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};
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struct bnx2x_dcbx_pg_params {
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u32 enabled;
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u8 num_of_cos; /* valid COS entries */
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struct bnx2x_dcbx_cos_params cos_params[DCBX_COS_MAX_NUM];
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};
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struct bnx2x_dcbx_pfc_params {
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u32 enabled;
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u32 priority_non_pauseable_mask;
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};
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struct bnx2x_dcbx_port_params {
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struct bnx2x_dcbx_pfc_params pfc;
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struct bnx2x_dcbx_pg_params ets;
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struct bnx2x_dcbx_app_params app;
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};
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#define BNX2X_DCBX_CONFIG_INV_VALUE (0xFFFFFFFF)
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#define BNX2X_DCBX_OVERWRITE_SETTINGS_DISABLE 0
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#define BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE 1
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#define BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID (BNX2X_DCBX_CONFIG_INV_VALUE)
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#define BNX2X_IS_ETS_ENABLED(bp) ((bp)->dcb_state == BNX2X_DCB_STATE_ON &&\
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(bp)->dcbx_port_params.ets.enabled)
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struct bnx2x_config_lldp_params {
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u32 overwrite_settings;
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u32 msg_tx_hold;
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u32 msg_fast_tx;
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u32 tx_credit_max;
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u32 msg_tx_interval;
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u32 tx_fast;
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};
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struct bnx2x_admin_priority_app_table {
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u32 valid;
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u32 priority;
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#define INVALID_TRAFFIC_TYPE_PRIORITY (0xFFFFFFFF)
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u32 traffic_type;
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#define TRAFFIC_TYPE_ETH 0
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#define TRAFFIC_TYPE_PORT 1
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u32 app_id;
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};
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#define DCBX_CONFIG_MAX_APP_PROTOCOL 4
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struct bnx2x_config_dcbx_params {
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u32 overwrite_settings;
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u32 admin_dcbx_version;
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u32 admin_ets_enable;
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u32 admin_pfc_enable;
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u32 admin_tc_supported_tx_enable;
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u32 admin_ets_configuration_tx_enable;
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u32 admin_ets_recommendation_tx_enable;
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u32 admin_pfc_tx_enable;
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u32 admin_application_priority_tx_enable;
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u32 admin_ets_willing;
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u32 admin_ets_reco_valid;
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u32 admin_pfc_willing;
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u32 admin_app_priority_willing;
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u32 admin_configuration_bw_precentage[8];
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u32 admin_configuration_ets_pg[8];
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u32 admin_recommendation_bw_precentage[8];
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u32 admin_recommendation_ets_pg[8];
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u32 admin_pfc_bitmap;
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struct bnx2x_admin_priority_app_table
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admin_priority_app_table[DCBX_CONFIG_MAX_APP_PROTOCOL];
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u32 admin_default_priority;
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};
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#define GET_FLAGS(flags, bits) ((flags) & (bits))
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#define SET_FLAGS(flags, bits) ((flags) |= (bits))
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#define RESET_FLAGS(flags, bits) ((flags) &= ~(bits))
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enum {
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DCBX_READ_LOCAL_MIB,
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DCBX_READ_REMOTE_MIB
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};
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#define ETH_TYPE_FCOE (0x8906)
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#define TCP_PORT_ISCSI (0xCBC)
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#define PFC_VALUE_FRAME_SIZE (512)
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#define PFC_QUANTA_IN_NANOSEC_FROM_SPEED_MEGA(mega_speed) \
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((1000 * PFC_VALUE_FRAME_SIZE)/(mega_speed))
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#define PFC_BRB1_REG_HIGH_LLFC_LOW_THRESHOLD 130
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#define PFC_BRB1_REG_HIGH_LLFC_HIGH_THRESHOLD 170
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struct cos_entry_help_data {
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u32 pri_join_mask;
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u32 cos_bw;
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u8 strict;
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bool pausable;
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};
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struct cos_help_data {
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struct cos_entry_help_data data[DCBX_COS_MAX_NUM];
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u8 num_of_cos;
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};
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#define DCBX_ILLEGAL_PG (0xFF)
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#define DCBX_PFC_PRI_MASK (0xFF)
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#define DCBX_STRICT_PRIORITY (15)
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#define DCBX_INVALID_COS_BW (0xFFFFFFFF)
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#define DCBX_PFC_PRI_NON_PAUSE_MASK(bp) \
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((bp)->dcbx_port_params.pfc.priority_non_pauseable_mask)
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#define DCBX_PFC_PRI_PAUSE_MASK(bp) \
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((u8)~DCBX_PFC_PRI_NON_PAUSE_MASK(bp))
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#define DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri) \
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((pg_pri) & (DCBX_PFC_PRI_PAUSE_MASK(bp)))
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#define DCBX_PFC_PRI_GET_NON_PAUSE(bp, pg_pri) \
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(DCBX_PFC_PRI_NON_PAUSE_MASK(bp) & (pg_pri))
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#define DCBX_IS_PFC_PRI_SOME_PAUSE(bp, pg_pri) \
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(0 != DCBX_PFC_PRI_GET_PAUSE(bp, pg_pri))
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#define IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pg_pri) \
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(pg_pri == DCBX_PFC_PRI_GET_PAUSE((bp), (pg_pri)))
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#define IS_DCBX_PFC_PRI_ONLY_NON_PAUSE(bp, pg_pri)\
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((pg_pri) == DCBX_PFC_PRI_GET_NON_PAUSE((bp), (pg_pri)))
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#define IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pg_pri) \
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(!(IS_DCBX_PFC_PRI_ONLY_NON_PAUSE((bp), (pg_pri)) || \
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IS_DCBX_PFC_PRI_ONLY_PAUSE((bp), (pg_pri))))
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struct pg_entry_help_data {
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u8 num_of_dif_pri;
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u8 pg;
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u32 pg_priority;
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};
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struct pg_help_data {
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struct pg_entry_help_data data[LLFC_DRIVER_TRAFFIC_TYPE_MAX];
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u8 num_of_pg;
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};
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/* forward DCB/PFC related declarations */
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struct bnx2x;
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void bnx2x_dcbx_update(struct work_struct *work);
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void bnx2x_dcbx_init_params(struct bnx2x *bp);
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void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled);
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enum {
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BNX2X_DCBX_STATE_NEG_RECEIVED = 0x1,
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BNX2X_DCBX_STATE_TX_PAUSED,
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BNX2X_DCBX_STATE_TX_RELEASED
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};
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void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state);
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void bnx2x_dcbx_pmf_update(struct bnx2x *bp);
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/* DCB netlink */
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#ifdef BCM_DCBNL
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extern const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops;
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int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall);
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#endif /* BCM_DCBNL */
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int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
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int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
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#endif /* BNX2X_DCB_H */
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