af6ab107ce
The MediaTek DPI module is typically associated with one of the
following multimedia power domains:
- POWER_DOMAIN_DISPLAY
- POWER_DOMAIN_VDOSYS
- POWER_DOMAIN_MM
The specific power domain used varies depending on the SoC design.
These power domains are shared by multiple devices within the SoC.
In most cases, these power domains are enabled by other devices.
As a result, the DPI module of legacy SoCs often functions correctly
even without explicit configuration.
It is recommended to explicitly add the appropriate power domain
property to the DPI node in the device tree. Hence drop the
compatible checking for specific SoCs.
Fixes: 5474d49b2f ("dt-bindings: display: mediatek: dpi: Add power domains")
Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Pablo Sun <pablo.sun@mediatek.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20241003030919.17980-4-macpaul.lin@mediatek.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
118 lines
2.8 KiB
YAML
118 lines
2.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/mediatek/mediatek,dpi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek DPI and DP_INTF Controller
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maintainers:
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- CK Hu <ck.hu@mediatek.com>
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- Jitao shi <jitao.shi@mediatek.com>
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description: |
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The MediaTek DPI and DP_INTF function blocks are a sink of the display
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subsystem and provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a
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parallel output bus.
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properties:
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compatible:
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oneOf:
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- enum:
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- mediatek,mt2701-dpi
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- mediatek,mt7623-dpi
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- mediatek,mt8173-dpi
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- mediatek,mt8183-dpi
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- mediatek,mt8186-dpi
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- mediatek,mt8188-dp-intf
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- mediatek,mt8192-dpi
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- mediatek,mt8195-dp-intf
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- items:
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- enum:
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- mediatek,mt6795-dpi
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- const: mediatek,mt8183-dpi
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- items:
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- enum:
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- mediatek,mt8365-dpi
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- const: mediatek,mt8192-dpi
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Pixel Clock
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- description: Engine Clock
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- description: DPI PLL
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clock-names:
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items:
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- const: pixel
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- const: engine
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- const: pll
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pinctrl-0: true
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pinctrl-1: true
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pinctrl-names:
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items:
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- const: default
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- const: sleep
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power-domains:
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description: |
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The MediaTek DPI module is typically associated with one of the
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following multimedia power domains:
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POWER_DOMAIN_DISPLAY
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POWER_DOMAIN_VDOSYS
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POWER_DOMAIN_MM
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The specific power domain used varies depending on the SoC design.
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It is recommended to explicitly add the appropriate power domain
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property to the DPI node in the device tree.
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maxItems: 1
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port:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Output port node. This port should be connected to the input port of an
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attached HDMI, LVDS or DisplayPort encoder chip.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- port
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/mt8173-clk.h>
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dpi0: dpi@1401d000 {
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compatible = "mediatek,mt8173-dpi";
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reg = <0x1401d000 0x1000>;
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interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&mmsys CLK_MM_DPI_PIXEL>,
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<&mmsys CLK_MM_DPI_ENGINE>,
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<&apmixedsys CLK_APMIXED_TVDPLL>;
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clock-names = "pixel", "engine", "pll";
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pinctrl-names = "default", "sleep";
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pinctrl-0 = <&dpi_pin_func>;
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pinctrl-1 = <&dpi_pin_idle>;
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port {
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dpi0_out: endpoint {
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remote-endpoint = <&hdmi0_in>;
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};
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};
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};
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...
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