In the LTS (2310) version the miniPCIe slot got removed and USB 2.0 setup has changed. There are two external accessible ports and two ports on the internal header. There is an on-board USB hub which provides: - one external connector (bottom one) - two internal ports on pin header - one port for m.2 E connector The top USB 2.0 connector comes directly from the SoC. Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> Link: https://lore.kernel.org/r/20240829-friendlyelec-nanopc-t6-lts-v6-4-edff247e8c02@linaro.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
60 lines
1.1 KiB
Devicetree
60 lines
1.1 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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* Copyright (c) 2023 Thomas McKahan
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* Copyright (c) 2024 Linaro Ltd.
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*
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*/
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/dts-v1/;
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#include "rk3588-nanopc-t6.dtsi"
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/ {
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model = "FriendlyElec NanoPC-T6 LTS";
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compatible = "friendlyarm,nanopc-t6-lts", "rockchip,rk3588";
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/* provide power for on-board USB 2.0 hub */
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vcc5v0_usb20_host: vcc5v0-usb20-host-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&usb20_host_pwren>;
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pinctrl-names = "default";
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regulator-always-on;
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regulator-boot-on;
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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regulator-name = "vcc5v0_usb20_host";
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vin-supply = <&vcc5v0_sys>;
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};
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};
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&pinctrl {
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usb {
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usb20_host_pwren: usb20-host-pwren {
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rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&u2phy1 {
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status = "okay";
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};
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&u2phy1_otg {
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status = "okay";
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};
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&u2phy2_host {
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phy-supply = <&vcc5v0_usb20_host>;
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};
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&usbdp_phy1 {
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status = "okay";
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};
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&usb_host1_xhci {
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dr_mode = "host";
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status = "okay";
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};
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